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llvm-mirror/test/MC/AMDGPU
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Artem Tamazov 7abf7635ee [AMDGPU][mc] Enable absolute expressions in .hsa_code_object_isa directive 
Among other stuff, this allows to use predefined .option.machine_version_major
/minor/stepping symbols in the directive.

Relevant test expanded at once (also file renamed for clarity).

Differential Revision: https://reviews.llvm.org/D28140

llvm-svn: 290710
2016-12-29 15:41:52 +00:00
..
regression
buffer_wbinv1l_vol_vi.s
ds-err.s
ds.s [AMDGPU][mc] Fix ds_min/max[_rtn]_f32 - extra source operand removed. 2016-10-21 14:49:22 +00:00
exp-err.s AMDGPU: Assembler support for exp 2016-12-05 20:42:41 +00:00
exp.s AMDGPU: Assembler support for exp 2016-12-05 20:42:41 +00:00
expressions.s
flat-scratch.s
flat.s
hsa_code_object_isa_args.s [AMDGPU][mc] Enable absolute expressions in .hsa_code_object_isa directive 2016-12-29 15:41:52 +00:00
hsa-exp.s
hsa-text.s
hsa.s AMDGPU: [AMDGPU] Assembler: add .hsa_code_object_metadata directive for functime metadata V2.0 2016-12-19 11:43:15 +00:00
labels-branch.s [AMDGPU] Disassembler: print label names in branch instructions 2016-10-06 13:46:08 +00:00
lit.local.cfg
literal16-err.s AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
literal16.s AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
literals.s AMDGPU: Fix formatting of 1/2pi immediate 2016-11-15 00:04:33 +00:00
macro-examples.s
max-branch-distance.s
metadata.s AMDGPU: [AMDGPU] Assembler: add .hsa_code_object_metadata directive for functime metadata V2.0 2016-12-19 11:43:15 +00:00
mimg.s
mubuf.s [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3. 2016-10-07 15:53:16 +00:00
out-of-range-registers.s
reg-syntax-extra.s
reloc.s [AMDGPU] Add 32-bit lo/hi got and pc relative variant kinds and emit appropriate relocations 2016-10-14 04:21:32 +00:00
smem-err.s AMDGPU: Disallow exec as SMEM instruction operand 2016-11-29 19:39:53 +00:00
smem.s AMDGPU: Allow TBA, TMA, TTMP* registers with SMEM instructions 2016-12-09 17:49:11 +00:00
smrd-err.s AMDGPU: Add definitions for scalar store instructions 2016-10-28 21:55:15 +00:00
smrd.s AMDGPU: Allow TBA, TMA, TTMP* registers with SMEM instructions 2016-12-09 17:49:11 +00:00
sop1-err.s
sop1.s AMDGPU: Add instruction definitions for VGPR indexing 2016-10-12 18:00:51 +00:00
sop2.s
sopc-err.s AMDGPU: Add instruction definitions for VGPR indexing 2016-10-12 18:00:51 +00:00
sopc.s AMDGPU: Add instruction definitions for VGPR indexing 2016-10-12 18:00:51 +00:00
sopk-err.s
sopk.s
sopp-err.s
sopp.s AMDGPU: Add instruction definitions for VGPR indexing 2016-10-12 18:00:51 +00:00
sym_kernel_scope.s [AMDGPU][llvm-mc] Predefined symbols to access register counts (.kernel.{v|s}gpr_count) 2016-12-27 16:00:11 +00:00
sym_option.s [AMDGPU][llvm-mc] Predefined symbols to access register counts (.kernel.{v|s}gpr_count) 2016-12-27 16:00:11 +00:00
trap.s
vintrp-err.s AMDGPU: Assembler support for vintrp instructions 2016-12-15 20:40:20 +00:00
vintrp.s AMDGPU: Assembler support for vintrp instructions 2016-12-15 20:40:20 +00:00
vop1.s
vop2-err.s
vop2.s AMDGPU: Fix name for v_ashrrev_i16 2016-12-16 17:40:11 +00:00
vop3-convert.s AMDGPU: Fix name for v_ashrrev_i16 2016-12-16 17:40:11 +00:00
vop3-errs.s
vop3-vop1-nosrc.s
vop3.s [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h 2016-10-07 14:46:06 +00:00
vop_dpp_expr.s [AMDGPU][mc] Add support for absolute expressions in DPP modifiers. 2016-09-22 11:47:21 +00:00
vop_dpp.s [AMDGPU] Assembler: support SDWA and DPP for VOP2b instructions 2016-12-27 10:06:42 +00:00
vop_sdwa.s [AMDGPU] Assembler: support SDWA and DPP for VOP2b instructions 2016-12-27 10:06:42 +00:00
vopc-errs.s
vopc-vi.s AMDGPU: Fix missing 16-bit cmpx instructions 2016-12-22 16:27:14 +00:00
vopc.s