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https://github.com/RPCS3/llvm-mirror.git
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d5cead992a
This updates the MIRPrinter to include the regclass when printing virtual register defs, which is already valid syntax for the parser. That is, given 64 bit %0 and %1 in a "gpr" regbank, %1(s64) = COPY %0(s64) would now be written as %1:gpr(s64) = COPY %0(s64) While this change alone introduces a bit of redundancy with the registers block, it allows us to update the tests to be more concise and understandable and brings us closer to being able to remove the registers block completely. Note: We generally only print the class in defs, but there is one exception. If there are uses without any defs whatsoever, we'll print the class on all uses. I'm not completely convinced this comes up in meaningful machine IR, but for now the MIRParser and MachineVerifier both accept that kind of stuff, so we don't want to have a situation where we can print something we can't parse. llvm-svn: 316479
334 lines
9.0 KiB
YAML
334 lines
9.0 KiB
YAML
# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=IOS
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# RUN: llc -O0 -mtriple=aarch64-linux-gnu -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX-DEFAULT
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# RUN: llc -O0 -mtriple=aarch64-linux-gnu -relocation-model=pic -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX-PIC
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @frame_index() {
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%ptr0 = alloca i64
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ret void
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}
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define i8* @gep(i8* %in) { ret i8* undef }
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define i8* @ptr_mask(i8* %in) { ret i8* undef }
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@var_local = global i8 0
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define i8* @global_local() { ret i8* undef }
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@var_got = external global i8
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define i8* @global_got() { ret i8* undef }
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define void @icmp() { ret void }
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define void @fcmp() { ret void }
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define void @phi() { ret void }
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define void @select() { ret void }
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...
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---
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# CHECK-LABEL: name: frame_index
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name: frame_index
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr64sp, preferred-register: '' }
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registers:
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- { id: 0, class: gpr }
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stack:
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- { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 }
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# CHECK: body:
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# CHECK: %0:gpr64sp = ADDXri %stack.0.ptr0, 0, 0
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body: |
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bb.0:
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%0(p0) = G_FRAME_INDEX %stack.0.ptr0
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%x0 = COPY %0(p0)
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...
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---
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# CHECK-LABEL: name: gep
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name: gep
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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# CHECK: body:
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# CHECK: %1:gpr64 = MOVi64imm 42
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# CHECK: %2:gpr64 = ADDXrr %0, %1
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body: |
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bb.0:
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liveins: %x0
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%0(p0) = COPY %x0
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%1(s64) = G_CONSTANT i64 42
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%2(p0) = G_GEP %0, %1(s64)
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%x0 = COPY %2(p0)
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...
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---
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# CHECK-LABEL: name: ptr_mask
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name: ptr_mask
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legalized: true
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regBankSelected: true
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# CHECK: body:
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# CHECK: %1:gpr64sp = ANDXri %0, 8060
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body: |
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bb.0:
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liveins: %x0
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%0:gpr(p0) = COPY %x0
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%1:gpr(p0) = G_PTR_MASK %0, 3
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%x0 = COPY %1(p0)
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...
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---
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# Global defined in the same linkage unit so no GOT is needed
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# CHECK-LABEL: name: global_local
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name: global_local
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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# CHECK: body:
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# IOS: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local
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# LINUX-DEFAULT: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local
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# LINUX-PIC: %0:gpr64 = LOADgot target-flags(aarch64-got) @var_local
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body: |
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bb.0:
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%0(p0) = G_GLOBAL_VALUE @var_local
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%x0 = COPY %0(p0)
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...
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---
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# CHECK-LABEL: name: global_got
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name: global_got
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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# CHECK: body:
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# IOS: %0:gpr64 = LOADgot target-flags(aarch64-got) @var_got
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# LINUX-DEFAULT: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_got, target-flags(aarch64-pageoff, aarch64-nc) @var_got
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# LINUX-PIC: %0:gpr64 = LOADgot target-flags(aarch64-got) @var_got
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body: |
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bb.0:
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%0(p0) = G_GLOBAL_VALUE @var_got
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%x0 = COPY %0(p0)
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...
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---
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# CHECK-LABEL: name: icmp
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name: icmp
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 2, class: gpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '' }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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- { id: 5, class: gpr }
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- { id: 6, class: gpr }
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- { id: 7, class: gpr }
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- { id: 8, class: gpr }
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- { id: 9, class: gpr }
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- { id: 10, class: gpr }
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- { id: 11, class: gpr }
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# CHECK: body:
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# CHECK: %wzr = SUBSWrr %0, %0, implicit-def %nzcv
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# CHECK: %1:gpr32 = CSINCWr %wzr, %wzr, 1, implicit %nzcv
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# CHECK: %xzr = SUBSXrr %2, %2, implicit-def %nzcv
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# CHECK: %3:gpr32 = CSINCWr %wzr, %wzr, 3, implicit %nzcv
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# CHECK: %xzr = SUBSXrr %4, %4, implicit-def %nzcv
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# CHECK: %5:gpr32 = CSINCWr %wzr, %wzr, 0, implicit %nzcv
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body: |
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bb.0:
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liveins: %w0, %x0
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%0(s32) = COPY %w0
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%1(s32) = G_ICMP intpred(eq), %0, %0
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%6(s1) = G_TRUNC %1(s32)
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%9(s32) = G_ANYEXT %6
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%w0 = COPY %9(s32)
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%2(s64) = COPY %x0
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%3(s32) = G_ICMP intpred(uge), %2, %2
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%7(s1) = G_TRUNC %3(s32)
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%10(s32) = G_ANYEXT %7
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%w0 = COPY %10(s32)
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%4(p0) = COPY %x0
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%5(s32) = G_ICMP intpred(ne), %4, %4
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%8(s1) = G_TRUNC %5(s32)
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%11(s32) = G_ANYEXT %8
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%w0 = COPY %11(s32)
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...
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---
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# CHECK-LABEL: name: fcmp
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name: fcmp
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 2, class: fpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 4, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '' }
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registers:
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- { id: 0, class: fpr }
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- { id: 1, class: gpr }
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- { id: 2, class: fpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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- { id: 5, class: gpr }
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- { id: 6, class: gpr }
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- { id: 7, class: gpr }
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# CHECK: body:
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# CHECK: FCMPSrr %0, %0, implicit-def %nzcv
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# CHECK: [[TST_MI:%[0-9]+]]:gpr32 = CSINCWr %wzr, %wzr, 5, implicit %nzcv
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# CHECK: [[TST_GT:%[0-9]+]]:gpr32 = CSINCWr %wzr, %wzr, 13, implicit %nzcv
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# CHECK: %1:gpr32 = ORRWrr [[TST_MI]], [[TST_GT]]
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# CHECK: FCMPDrr %2, %2, implicit-def %nzcv
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# CHECK: %3:gpr32 = CSINCWr %wzr, %wzr, 4, implicit %nzcv
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body: |
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bb.0:
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liveins: %w0, %x0
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%0(s32) = COPY %s0
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%1(s32) = G_FCMP floatpred(one), %0, %0
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%4(s1) = G_TRUNC %1(s32)
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%6(s32) = G_ANYEXT %4
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%w0 = COPY %6(s32)
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%2(s64) = COPY %d0
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%3(s32) = G_FCMP floatpred(uge), %2, %2
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%5(s1) = G_TRUNC %3(s32)
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%7(s32) = G_ANYEXT %5
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%w0 = COPY %7(s32)
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...
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---
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# CHECK-LABEL: name: phi
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name: phi
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 2, class: fpr32, preferred-register: '' }
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registers:
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- { id: 0, class: fpr }
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- { id: 1, class: gpr }
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- { id: 2, class: fpr }
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# CHECK: body:
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# CHECK: bb.1:
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# CHECK: %2:fpr32 = PHI %0, %bb.0, %2, %bb.1
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body: |
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bb.0:
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liveins: %s0, %w0
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successors: %bb.1
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%0(s32) = COPY %s0
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%3:gpr(s32) = COPY %w0
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%1(s1) = G_TRUNC %3
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bb.1:
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successors: %bb.1, %bb.2
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%2(s32) = PHI %0, %bb.0, %2, %bb.1
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G_BRCOND %1, %bb.1
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bb.2:
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%s0 = COPY %2
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RET_ReallyLR implicit %s0
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...
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---
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# CHECK-LABEL: name: select
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name: select
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 2, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' }
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# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 5, class: gpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 6, class: gpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 7, class: gpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 8, class: gpr64, preferred-register: '' }
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# CHECK-NEXT: - { id: 9, class: gpr64, preferred-register: '' }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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- { id: 5, class: gpr }
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- { id: 6, class: gpr }
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- { id: 7, class: gpr }
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- { id: 8, class: gpr }
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- { id: 9, class: gpr }
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# CHECK: body:
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# CHECK: %wzr = ANDSWri %0, 0, implicit-def %nzcv
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# CHECK: %3:gpr32 = CSELWr %1, %2, 1, implicit %nzcv
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# CHECK: %wzr = ANDSWri %0, 0, implicit-def %nzcv
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# CHECK: %6:gpr64 = CSELXr %4, %5, 1, implicit %nzcv
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# CHECK: %wzr = ANDSWri %0, 0, implicit-def %nzcv
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# CHECK: %9:gpr64 = CSELXr %7, %8, 1, implicit %nzcv
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body: |
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bb.0:
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liveins: %w0, %w1, %w2
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%10:gpr(s32) = COPY %w0
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%0(s1) = G_TRUNC %10
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%1(s32) = COPY %w1
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%2(s32) = COPY %w2
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%3(s32) = G_SELECT %0, %1, %2
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%w0 = COPY %3(s32)
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%4(s64) = COPY %x0
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%5(s64) = COPY %x1
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%6(s64) = G_SELECT %0, %4, %5
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%x0 = COPY %6(s64)
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%7(p0) = COPY %x0
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%8(p0) = COPY %x1
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%9(p0) = G_SELECT %0, %7, %8
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%x0 = COPY %9(p0)
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...
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