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c6bd271cd0
llvm-mirror/lib/MCA
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Jay Foad c6bd271cd0 [MCA] Support in-order CPUs with MicroOpBufferSize=1 
Differential Revision: https://reviews.llvm.org/D98356
2021-03-11 10:12:54 +00:00
..
HardwareUnits [MCA] Support in-order CPUs with MicroOpBufferSize=1 2021-03-11 10:12:54 +00:00
Stages [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
CMakeLists.txt [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
CodeEmitter.cpp [MC][Bugfix] Remove redundant parameter for relaxInstruction 2020-04-21 11:06:55 +08:00
Context.cpp [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
HWEventListener.cpp
InstrBuilder.cpp [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
Instruction.cpp [MCA] consistently use MCPhysReg instead of unsigned as register type. NFCI 2019-08-22 13:32:17 +00:00
Pipeline.cpp Revert "Remove redundant "std::move"s in return statements" 2020-02-10 07:07:40 -08:00
Support.cpp [MCA] Improved debug prints. NFC 2019-02-12 16:18:57 +00:00