1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
llvm-mirror/test/CodeGen
Krzysztof Parzyszek 8d29c2a6a5 [Tail duplication] Handle source registers with subregisters
When a block is tail-duplicated, the PHI nodes from that block are
replaced with appropriate COPY instructions. When those PHI nodes
contained use operands with subregisters, the subregisters were
dropped from the COPY instructions, resulting in incorrect code.

Keep track of the subregister information and use this information
when remapping instructions from the duplicated block.

Differential Revision: http://reviews.llvm.org/D19337

llvm-svn: 267583
2016-04-26 18:36:34 +00:00
..
AArch64 [AArch64] Expand v1i64 and v2i64 ctlz. 2016-04-26 05:26:51 +00:00
AMDGPU [AMDGPU] Reserve VGPRs for trap handler usage if instructed 2016-04-26 15:43:14 +00:00
ARM [ARM] Expand vector ctlz_zero_undef so it becomes ctlz. 2016-04-26 05:04:37 +00:00
BPF
CPP
Generic Introduce llvm.load.relative intrinsic. 2016-04-22 21:18:02 +00:00
Hexagon [Tail duplication] Handle source registers with subregisters 2016-04-26 18:36:34 +00:00
Inputs [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
Lanai [lanai] Add subword scheduling itineraries. 2016-04-20 18:28:55 +00:00
Mips [mips][microMIPS] Revert commit r267137 2016-04-25 15:40:08 +00:00
MIR tests: tweak MIR for ARM tests to correct MI issues 2016-04-26 17:54:21 +00:00
MSP430
NVPTX [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
PowerPC [PowerPC] Add support for llvm.thread.pointer 2016-04-26 10:37:22 +00:00
SPARC [SPARC] [SSP] Add support for LOAD_STACK_GUARD. 2016-04-26 10:37:14 +00:00
SystemZ [SystemZ] [SSP] Add support for LOAD_STACK_GUARD. 2016-04-24 13:57:49 +00:00
Thumb [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
Thumb2 ARM: use r7 as the frame-pointer on all MachO targets. 2016-04-11 22:27:40 +00:00
WebAssembly [WebAssembly] Account for implicit operands when computing operand indices. 2016-04-26 01:40:56 +00:00
WinEH [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
X86 Swift Calling Convention: use %RAX for sret. 2016-04-26 18:08:06 +00:00
XCore [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00