1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
llvm-mirror/test/CodeGen/MIR/X86/missing-implicit-operand.mir
Matthias Braun 1bb3751439 llc: Add support for -run-pass none
This does not schedule any passes besides the ones necessary to
construct and print the machine function. This is useful to test .mir
file reading and printing.

Differential Revision: http://reviews.llvm.org/D22432

llvm-svn: 275664
2016-07-16 02:24:59 +00:00

39 lines
760 B
YAML

# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser reports an error when an instruction
# is missing one of its implicit register operands.
--- |
define i32 @foo(i32* %p) {
entry:
%a = load i32, i32* %p
%0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit
less:
ret i32 0
exit:
ret i32 %a
}
...
---
name: foo
body: |
bb.0.entry:
successors: %bb.1.less, %bb.2.exit
%eax = MOV32rm %rdi, 1, _, 0, _
CMP32ri8 %eax, 10, implicit-def %eflags
; CHECK: [[@LINE+1]]:20: missing implicit register operand 'implicit %eflags'
JG_1 %bb.2.exit
bb.1.less:
%eax = MOV32r0 implicit-def %eflags
bb.2.exit:
RETQ %eax
...