Daniel Sanders c91fe0f456 [mips] Remove -mattr=+n64 and fix indentation in tailcall.ll RUN lines. NFC. ... -mattr=+n64 isn't the correct way to specify the ABI and N64 is already the default for the RUN line concerned. llvm-svn: 268482		2016-05-04 09:08:35 +00:00
..
AArch64	Fix uppercase typo	2016-05-03 05:21:53 +00:00
AMDGPU	AMDGPU: Custom lower v2i32 loads and stores	2016-05-02 20:13:51 +00:00
ARM	[ARM] Set correct successors in CMPXCHG pseudo expansion.	2016-04-27 20:32:54 +00:00
BPF
CPP
Generic	Introduce llvm.load.relative intrinsic.	2016-04-22 21:18:02 +00:00
Hexagon	[Hexagon] Optimize addressing modes for load/store	2016-04-29 15:49:13 +00:00
Inputs	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
Lanai	[lanai] Add subword scheduling itineraries.	2016-04-20 18:28:55 +00:00
Mips	[mips] Remove -mattr=+n64 and fix indentation in tailcall.ll RUN lines. NFC.	2016-05-04 09:08:35 +00:00
MIR	ARM: fix handling of SUB immediates in peephole opt.	2016-05-02 18:30:08 +00:00
MSP430
NVPTX	[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection	2016-05-02 18:12:02 +00:00
PowerPC	[MBP] Use Function::optForSize() instead of checking OptimizeForSize directly.	2016-04-29 22:01:10 +00:00
SPARC	[SPARC] [SSP] Add support for LOAD_STACK_GUARD.	2016-04-26 10:37:14 +00:00
SystemZ	[SystemZ] Temporarily disable codegen test int-add-12.ll.	2016-05-02 10:42:47 +00:00
Thumb	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
Thumb2	ARM: use r7 as the frame-pointer on all MachO targets.	2016-04-11 22:27:40 +00:00
WebAssembly	[WebAssembly] Rename memory_size intrinsic to current_memory	2016-05-02 17:25:22 +00:00
WinEH	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
X86	[X86] Lower zext i1 arguments	2016-05-04 00:22:23 +00:00
XCore	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00