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https://github.com/RPCS3/llvm-mirror.git
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22a074ddad
Since 6524a7a2b9ca072bd7f7b4355d1230e70c679d2f, this would sometimes not emit the or to exec at the beginning of the block, where it really has to be. If there is an instruction that defines one of the source operands, split the block and turn the si_end_cf into a terminator. This avoids regressions when regalloc fast is switched to inserting reloads at the beginning of the block, instead of spills at the end of the block. In a future change, this should always split the block.
374 lines
15 KiB
YAML
374 lines
15 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=liveintervals,si-lower-control-flow,si-lower-control-flow -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN %s
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# Check that assert is not triggered
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---
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name: si-lower-control-flow
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body: |
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bb.0:
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; GCN-LABEL: name: si-lower-control-flow
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; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5
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; GCN: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 16, 0, 0
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; GCN: [[S_AND_B32_:%[0-9]+]]:sreg_32_xm0 = S_AND_B32 [[S_LOAD_DWORD_IMM]], 255, implicit-def $scc
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; GCN: dead %3:sreg_32_xm0 = S_AND_B32 65535, [[S_AND_B32_]], implicit-def $scc
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; GCN: S_ENDPGM 0
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%0:sgpr_64 = COPY $sgpr4_sgpr5
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%1:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %0, 16, 0, 0
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%2:sreg_32_xm0 = S_AND_B32 %1, 255, implicit-def $scc
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%3:sreg_32_xm0 = S_AND_B32 65535, %2, implicit-def $scc
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S_ENDPGM 0
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...
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---
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name: preserve_undef_flag_si_if_src
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: preserve_undef_flag_si_if_src
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
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; GCN: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[S_AND_B64_]], [[COPY]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; GCN: S_BRANCH %bb.1
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; GCN: bb.1:
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; GCN: successors: %bb.2(0x80000000)
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; GCN: bb.2:
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; GCN: S_ENDPGM 0
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bb.0:
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successors: %bb.1, %bb.2
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%1:sreg_64 = SI_IF undef %0:sreg_64, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# We need to split the block for SI_END_CF, but
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---
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name: end_cf_split_block_end
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: end_cf_split_block_end
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; GCN: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; GCN: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
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; GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: bb.1:
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; GCN: successors: %bb.2(0x80000000)
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; GCN: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term]]
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; GCN: $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
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; GCN: bb.2:
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; GCN: S_ENDPGM 0
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
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%0:vgpr_32 = COPY killed $vgpr0
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%1:vgpr_32 = COPY killed $vgpr1
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%3:sreg_64_xexec = V_CMP_EQ_U32_e64 killed %0, killed %1, implicit $exec
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%4:sreg_64_xexec = SI_IF %3, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%5:sreg_64_xexec = S_MOV_B64_term %4, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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successors: %bb.2
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%6:sreg_64_xexec = COPY %5
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SI_END_CF killed %6, implicit-def $exec, implicit-def dead $scc, implicit $exec
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bb.2:
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S_ENDPGM 0
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...
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---
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name: end_cf_split_block_physreg_livein
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: end_cf_split_block_physreg_livein
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; GCN: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31, $sgpr4_sgpr5
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; GCN: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
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; GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: bb.1:
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; GCN: successors: %bb.3(0x80000000)
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5
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; GCN: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term]]
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; GCN: S_NOP 0
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; GCN: $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
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; GCN: bb.3:
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; GCN: successors: %bb.2(0x80000000)
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5
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; GCN: S_SLEEP 3
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; GCN: S_NOP 0, implicit $vgpr0, implicit $sgpr4_sgpr5
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; GCN: bb.2:
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; GCN: S_ENDPGM 0
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31, $sgpr4_sgpr5
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%0:vgpr_32 = COPY killed $vgpr0
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%1:vgpr_32 = COPY killed $vgpr1
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%3:sreg_64_xexec = V_CMP_EQ_U32_e64 killed %0, killed %1, implicit $exec
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%4:sreg_64_xexec = SI_IF %3, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%5:sreg_64_xexec = S_MOV_B64_term %4, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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successors: %bb.2
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liveins: $vgpr0, $sgpr4_sgpr5
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%6:sreg_64_xexec = COPY %5
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S_NOP 0
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SI_END_CF killed %6, implicit-def $exec, implicit-def dead $scc, implicit $exec
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S_SLEEP 3
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S_NOP 0, implicit $vgpr0, implicit $sgpr4_sgpr5
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bb.2:
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S_ENDPGM 0
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...
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---
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name: end_cf_split_block_physreg_livein_liveout
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: end_cf_split_block_physreg_livein_liveout
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; GCN: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11:0x0000000000000003
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; GCN: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
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; GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: bb.1:
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; GCN: successors: %bb.3(0x80000000)
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11:0x0000000000000003
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; GCN: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term]]
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; GCN: $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
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; GCN: bb.3:
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; GCN: successors: %bb.2(0x80000000)
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5, $sgpr8_sgpr9
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; GCN: S_SLEEP 3
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; GCN: S_NOP 0
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; GCN: bb.2:
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11:0x0000000000000003
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; GCN: S_ENDPGM 0, implicit $vgpr0, implicit $sgpr4_sgpr5, implicit $sgpr8_sgpr9_sgpr10_sgpr11
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11:0x00000003
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%0:vgpr_32 = COPY killed $vgpr0
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%1:vgpr_32 = COPY killed $vgpr1
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%3:sreg_64_xexec = V_CMP_EQ_U32_e64 killed %0, killed %1, implicit $exec
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%4:sreg_64_xexec = SI_IF %3, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%5:sreg_64_xexec = S_MOV_B64_term %4, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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successors: %bb.2
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liveins: $vgpr0, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11:0x00000003
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%6:sreg_64_xexec = COPY %5
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SI_END_CF killed %6, implicit-def $exec, implicit-def dead $scc, implicit $exec
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S_SLEEP 3
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S_NOP 0
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bb.2:
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liveins: $vgpr0, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11:0x00000003
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S_ENDPGM 0, implicit $vgpr0, implicit $sgpr4_sgpr5, implicit $sgpr8_sgpr9_sgpr10_sgpr11
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...
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---
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name: end_cf_split_block_physreg_liveout
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: end_cf_split_block_physreg_liveout
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; GCN: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; GCN: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
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; GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: bb.1:
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; GCN: successors: %bb.3(0x80000000)
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; GCN: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term]]
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; GCN: $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
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; GCN: bb.3:
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; GCN: successors: %bb.2(0x80000000)
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; GCN: liveins: $vgpr3
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; GCN: $vgpr3 = V_MOV_B32_e32 0, implicit $exec
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; GCN: $sgpr4_sgpr5 = S_MOV_B64 32
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; GCN: bb.2:
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; GCN: liveins: $vgpr3, $sgpr4_sgpr5
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; GCN: S_ENDPGM 0, implicit $vgpr3, implicit $sgpr4_sgpr5
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
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%0:vgpr_32 = COPY killed $vgpr0
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%1:vgpr_32 = COPY killed $vgpr1
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%3:sreg_64_xexec = V_CMP_EQ_U32_e64 killed %0, killed %1, implicit $exec
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%4:sreg_64_xexec = SI_IF %3, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%5:sreg_64_xexec = S_MOV_B64_term %4, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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successors: %bb.2
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%6:sreg_64_xexec = COPY %5
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SI_END_CF killed %6, implicit-def $exec, implicit-def dead $scc, implicit $exec
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$vgpr3 = V_MOV_B32_e32 0, implicit $exec
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$sgpr4_sgpr5 = S_MOV_B64 32
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bb.2:
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liveins: $vgpr3, $sgpr4_sgpr5
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S_ENDPGM 0, implicit $vgpr3, implicit $sgpr4_sgpr5
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...
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---
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name: end_cf_split_block_physreg_live_across_split
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: end_cf_split_block_physreg_live_across_split
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; GCN: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31, $sgpr4_sgpr5
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; GCN: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
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; GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: bb.1:
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; GCN: successors: %bb.3(0x80000000)
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5
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; GCN: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term]]
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; GCN: $sgpr4_sgpr5 = S_MOV_B64 32
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; GCN: $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
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; GCN: bb.3:
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; GCN: successors: %bb.2(0x80000000)
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5
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; GCN: S_SLEEP 3, implicit $sgpr4_sgpr5
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; GCN: S_NOP 0
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; GCN: bb.2:
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; GCN: liveins: $vgpr0, $sgpr4_sgpr5
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; GCN: S_ENDPGM 0, implicit $vgpr0, implicit $sgpr4_sgpr5
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31, $sgpr4_sgpr5
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%0:vgpr_32 = COPY killed $vgpr0
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%1:vgpr_32 = COPY killed $vgpr1
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%3:sreg_64_xexec = V_CMP_EQ_U32_e64 killed %0, killed %1, implicit $exec
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%4:sreg_64_xexec = SI_IF %3, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
|
|
%5:sreg_64_xexec = S_MOV_B64_term %4, implicit $exec
|
|
S_BRANCH %bb.2
|
|
|
|
bb.1:
|
|
successors: %bb.2
|
|
liveins: $vgpr0, $sgpr4_sgpr5
|
|
|
|
%6:sreg_64_xexec = COPY %5
|
|
$sgpr4_sgpr5 = S_MOV_B64 32
|
|
SI_END_CF killed %6, implicit-def $exec, implicit-def dead $scc, implicit $exec
|
|
S_SLEEP 3, implicit $sgpr4_sgpr5
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
liveins: $vgpr0, $sgpr4_sgpr5
|
|
S_ENDPGM 0, implicit $vgpr0, implicit $sgpr4_sgpr5
|
|
|
|
...
|
|
|
|
---
|
|
name: end_cf_split_block_process_next_inst
|
|
tracksRegLiveness: true
|
|
body: |
|
|
; GCN-LABEL: name: end_cf_split_block_process_next_inst
|
|
; GCN: bb.0:
|
|
; GCN: successors: %bb.1(0x80000000)
|
|
; GCN: liveins: $vgpr0, $vgpr1, $vgpr2
|
|
; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
|
; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
|
|
; GCN: [[V_CMP_EQ_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY2]], implicit $exec
|
|
; GCN: dead %5:sreg_64_xexec = S_MOV_B64 0
|
|
; GCN: bb.1:
|
|
; GCN: successors: %bb.3(0x80000000)
|
|
; GCN: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[V_CMP_EQ_U32_e64_]]
|
|
; GCN: $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
|
|
; GCN: bb.3:
|
|
; GCN: successors: %bb.2(0x80000000)
|
|
; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
|
; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_EQ_U32_e64_1]], implicit-def dead $scc
|
|
; GCN: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY4]], implicit-def dead $scc
|
|
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
|
|
; GCN: dead %8:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
|
|
; GCN: S_CBRANCH_EXECZ %bb.2, implicit $exec
|
|
; GCN: bb.2:
|
|
; GCN: S_ENDPGM 0
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1, $vgpr2
|
|
|
|
%0:vgpr_32 = COPY killed $vgpr0
|
|
%1:vgpr_32 = COPY killed $vgpr1
|
|
%2:vgpr_32 = COPY killed $vgpr2
|
|
%3:sreg_64_xexec = V_CMP_EQ_U32_e64 %0, killed %1, implicit $exec
|
|
%4:sreg_64_xexec = V_CMP_EQ_U32_e64 killed %0, killed %2, implicit $exec
|
|
%5:sreg_64_xexec = S_MOV_B64 0
|
|
|
|
bb.1:
|
|
successors: %bb.2
|
|
|
|
%6:sreg_64_xexec = COPY %3
|
|
SI_END_CF killed %6, implicit-def $exec, implicit-def dead $scc, implicit $exec
|
|
%7:sreg_64_xexec = SI_IF %4, %bb.2, implicit-def $exec, implicit-def dead $scc, implicit $exec
|
|
%8:sreg_64_xexec = S_MOV_B64_term %7, implicit $exec
|
|
|
|
bb.2:
|
|
S_ENDPGM 0
|
|
|
|
...
|