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llvm-mirror/lib/Target/AMDGPU
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Matt Arsenault 42ea6294ae AMDGPU: Fix crash with unreachable terminators. 
If a block has no successors because it ends in unreachable,
this was accessing an invalid iterator.

Also stop counting instructions that don't emit any
real instructions.

llvm-svn: 268119
2016-04-29 21:52:13 +00:00
..
AsmParser Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." 2016-04-29 17:04:50 +00:00
Disassembler Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." 2016-04-29 17:04:50 +00:00
InstPrinter Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." 2016-04-29 17:04:50 +00:00
MCTargetDesc [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
TargetInfo
Utils AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit 2016-04-14 16:27:07 +00:00
AMDGPU.h AMDGPU: Remove SIFixSGPRLiveRanges pass 2016-04-14 17:42:29 +00:00
AMDGPU.td [AMDGPU] Reserve VGPRs for trap handler usage if instructed 2016-04-26 15:43:14 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAnnotateKernelFeatures.cpp AMDGPU: Implement addrspacecast 2016-04-25 19:27:24 +00:00
AMDGPUAnnotateUniformValues.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
AMDGPUAsmPrinter.cpp AMDGPU: Emit error if too much LDS is used 2016-04-28 19:37:35 +00:00
AMDGPUAsmPrinter.h [AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes 2016-04-26 17:24:40 +00:00
AMDGPUCallingConv.td AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
AMDGPUCallLowering.cpp AMDGPU: Add skeleton GlobalIsel implementation 2016-04-14 19:09:28 +00:00
AMDGPUCallLowering.h AMDGPU: Add skeleton GlobalIsel implementation 2016-04-14 19:09:28 +00:00
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h AMDGPU: Add SIWholeQuadMode pass 2016-03-21 20:28:33 +00:00
AMDGPUInstrInfo.td AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2} 2016-04-01 18:27:37 +00:00
AMDGPUInstructions.td AMDGPU: Implement canonicalize 2016-04-14 01:42:16 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions 2016-04-29 14:34:26 +00:00
AMDGPUISelLowering.cpp [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior. 2016-04-28 03:34:31 +00:00
AMDGPUISelLowering.h AMDGPU: Remove custom load/store scalarization 2016-04-14 23:31:26 +00:00
AMDGPUMachineFunction.cpp AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
AMDGPUMachineFunction.h AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
AMDGPUMCInstLower.cpp AMDGPU: Verify instructions in non-debug builds as well 2016-03-16 09:10:42 +00:00
AMDGPUMCInstLower.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AMDGPUPromoteAlloca.cpp AMDGPU: Fix mishandling array allocations when promoting alloca 2016-04-28 18:38:48 +00:00
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp [AMDGPU] Reserve VGPRs for trap handler usage if instructed 2016-04-26 15:43:14 +00:00
AMDGPUSubtarget.h [AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes 2016-04-26 17:24:40 +00:00
AMDGPUTargetMachine.cpp AMDGPU/SI: Move post regalloc run of SIShrinkInstructions 2016-04-29 20:23:42 +00:00
AMDGPUTargetMachine.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic 2016-04-22 04:04:08 +00:00
AMDGPUTargetTransformInfo.h AMDGPU: Partially implement getArithmeticInstrCost for FP ops 2016-03-25 01:00:32 +00:00
AMDILCFGStructurizer.cpp Bug 20810: Use report_fatal_error instead of unreachable 2016-03-02 03:33:55 +00:00
AMDKernelCodeT.h [AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields) 2016-02-24 10:54:25 +00:00
CaymanInstructions.td
CIInstructions.td AMDGPU: Implement i64 global atomics 2016-04-12 14:05:11 +00:00
CMakeLists.txt AMDGPU: Add skeleton GlobalIsel implementation 2016-04-14 19:09:28 +00:00
EvergreenInstructions.td
LLVMBuild.txt
Processors.td AMDGPU/SI: Add Polaris support 2016-03-24 15:31:05 +00:00
R600ClauseMergePass.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
R600ControlFlowFinalizer.cpp AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
R600Defines.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
R600InstrInfo.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
R600Instructions.td
R600Intrinsics.td
R600ISelLowering.cpp [CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI. 2016-04-26 21:15:30 +00:00
R600ISelLowering.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
R600MachineScheduler.cpp
R600MachineScheduler.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
R600OptimizeVectorRegisters.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
R600Packetizer.cpp AMDGPU: Simplify boolean conditional return statements 2016-03-02 23:00:21 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp [StructurizeCFG] Annotate branches that were treated as uniform 2016-04-14 17:42:35 +00:00
SIDefines.h [AMDGPU] Assembler: basic support for SDWA instructions 2016-04-26 13:33:56 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp AMDGPU: Fix debug name of pass to better match 2016-04-21 18:21:54 +00:00
SIFoldOperands.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
SIFrameLowering.cpp AMDGPU/SI: Don't try to move scratch wave offset when there are no free SGPRs 2016-03-03 03:45:09 +00:00
SIFrameLowering.h
SIInsertNopsPass.cpp [AMDGPU] Insert nop pass: take care of outstanding feedback 2016-04-22 17:04:51 +00:00
SIInsertWaits.cpp AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic 2016-04-27 15:46:01 +00:00
SIInstrFormats.td [AMDGPU] Assembler: basic support for SDWA instructions 2016-04-26 13:33:56 +00:00
SIInstrInfo.cpp AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions 2016-04-29 14:34:26 +00:00
SIInstrInfo.h [MachineScheduler]Add support for store clustering 2016-04-15 14:58:38 +00:00
SIInstrInfo.td AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions 2016-04-29 14:34:26 +00:00
SIInstructions.td Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." 2016-04-29 17:04:50 +00:00
SIIntrinsics.td Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly 2016-04-21 17:48:02 +00:00
SIISelLowering.cpp AMDGPU: Add kernarg.segment.ptr intrinsic 2016-04-29 21:16:52 +00:00
SIISelLowering.h AMDGPU: Implement addrspacecast 2016-04-25 19:27:24 +00:00
SILoadStoreOptimizer.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
SILowerControlFlow.cpp AMDGPU: Fix crash with unreachable terminators. 2016-04-29 21:52:13 +00:00
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp [AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes 2016-04-26 17:24:40 +00:00
SIMachineFunctionInfo.h [AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes 2016-04-26 17:24:40 +00:00
SIMachineScheduler.cpp Fix a couple assertions that can never fire because they just contained the text string which always evaluates to true. Add a ! so they'll evaluate to false. 2016-04-24 02:01:25 +00:00
SIMachineScheduler.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
SIRegisterInfo.cpp [AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes 2016-04-26 17:24:40 +00:00
SIRegisterInfo.h AMDGPU: Enable LocalStackSlotAllocation pass 2016-04-16 02:13:37 +00:00
SIRegisterInfo.td Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." 2016-04-29 17:04:50 +00:00
SISchedule.td AMDGPU/SI: Improve MachineSchedModel definition 2016-03-30 16:35:13 +00:00
SIShrinkInstructions.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
SITypeRewriter.cpp AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
SIWholeQuadMode.cpp AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic 2016-04-22 04:04:08 +00:00
VIInstrFormats.td [AMDGPU] Assembler: basic support for SDWA instructions 2016-04-26 13:33:56 +00:00
VIInstructions.td [AMDGPU] Assembler: change v_madmk operands to have same order as mad. 2016-03-11 09:27:25 +00:00