..
AsmParser
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
Disassembler
[AMDGPU] Remove AMDGPURegisterInfo
2020-02-11 11:13:38 -08:00
MCTargetDesc
[MCStreamer] De-capitalize EmitValue EmitIntValue{,InHex}
2020-02-14 23:08:40 -08:00
TargetInfo
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
Utils
[AMDGPU] Add a16 feature to gfx10
2020-02-10 09:04:23 +01:00
AMDGPU.h
[AMDGPU] Bundle loads before post-RA scheduler
2020-01-24 11:33:38 -08:00
AMDGPU.td
[AMDGPU] Remove AMDGPURegisterInfo
2020-02-11 11:13:38 -08:00
AMDGPUAliasAnalysis.cpp
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp
AMDGPU: Simplify getAddressSpace calls
2019-10-31 07:51:38 -07:00
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
AMDGPUArgumentUsageInfo.cpp
AMDGPUArgumentUsageInfo.h
AMDGPUAsmPrinter.cpp
[MCStreamer] De-capitalize EmitValue EmitIntValue{,InHex}
2020-02-14 23:08:40 -08:00
AMDGPUAsmPrinter.h
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
AMDGPUAtomicOptimizer.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
AMDGPUCallingConv.td
AMDGPU: Allow i16 shader arguments
2020-01-27 06:55:32 -08:00
AMDGPUCallLowering.cpp
[GlobalISel] Tidy up unnecessary calls to createGenericVirtualRegister
2020-01-31 17:07:16 +00:00
AMDGPUCallLowering.h
AMDGPUCodeGenPrepare.cpp
[IRBuilder] Avoid passing IRBuilder by value; NFC
2020-02-17 18:14:47 +01:00
AMDGPUCombine.td
AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY
2020-01-31 06:58:04 -08:00
AMDGPUFeatures.td
AMDGPUFixFunctionBitcasts.cpp
AMDGPUFrameLowering.cpp
Use Align for TFL::TransientStackAlignment
2019-10-21 08:31:25 +00:00
AMDGPUFrameLowering.h
[Alignment][NFC] Deprecate Align::None()
2020-01-24 12:53:58 +01:00
AMDGPUGenRegisterBankInfo.def
AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT
2020-01-22 10:57:50 -05:00
AMDGPUGISel.td
AMDGPU/GlobalISel: Select llvm.amdgcn.s.buffer.load
2020-02-17 08:02:40 -08:00
AMDGPUGlobalISelUtils.cpp
AMDGPU/GlobalISel: Add new utils file
2020-01-03 15:25:50 -05:00
AMDGPUGlobalISelUtils.h
AMDGPU/GlobalISel: Add new utils file
2020-01-03 15:25:50 -05:00
AMDGPUHSAMetadataStreamer.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AMDGPUHSAMetadataStreamer.h
AMDGPUInline.cpp
[NFC] Refactor InlineResult for readability
2020-01-15 13:34:20 -08:00
AMDGPUInstrInfo.cpp
[AMDGPU] Remove AMDGPURegisterInfo
2020-02-11 11:13:38 -08:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic
2020-02-17 09:20:13 -05:00
AMDGPUInstructions.td
AMDGPU: Split denormal mode tracking bits
2020-02-04 10:44:21 -08:00
AMDGPUInstructionSelector.cpp
AMDGPU/GlobalISel: Select MUBUF path for global atomic cmpxchg
2020-02-19 06:19:22 -08:00
AMDGPUInstructionSelector.h
AMDGPU/GlobalISel: Select MUBUF path for global atomic cmpxchg
2020-02-19 06:19:22 -08:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Remove AMDGPURegisterInfo
2020-02-11 11:13:38 -08:00
AMDGPUISelLowering.cpp
[AMDGPU] simplifyI24 - replace GetDemandedBits with SimplifyMultipleUseDemandedBits
2020-02-20 12:03:08 +00:00
AMDGPUISelLowering.h
[TargetLowering] Add NegatibleCost enum for isNegatibleForFree return codes
2020-02-12 11:51:42 +00:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Adjust branch target when lowering loop intrinsic
2020-02-18 06:35:40 -08:00
AMDGPULegalizerInfo.h
AMDGPU/GlobalISel: Custom lower 32-bit G_SDIV/G_SREM
2020-02-17 15:09:51 -05:00
AMDGPULibCalls.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AMDGPULibFunc.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AMDGPULibFunc.h
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AMDGPULowerIntrinsics.cpp
AMDGPU: Add flag to control mem intrinsic expansion
2020-02-03 14:26:01 -08:00
AMDGPULowerKernelArguments.cpp
[Alignement][NFC] Deprecate untyped CreateAlignedLoad
2020-01-23 13:34:32 +01:00
AMDGPULowerKernelAttributes.cpp
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Fixes -Wrange-loop-analysis warnings
2019-12-22 19:39:28 +01:00
AMDGPUMachineFunction.cpp
AMDGPU: Refactor treatment of denormal mode
2019-11-19 19:55:43 +05:30
AMDGPUMachineFunction.h
AMDGPU: Refactor treatment of denormal mode
2019-11-19 19:55:43 +05:30
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUMCInstLower.cpp
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
AMDGPUPerfHintAnalysis.cpp
AMDGPUPerfHintAnalysis.h
AMDGPUPreLegalizerCombiner.cpp
GlobalISel: Extend narrowing to G_ASHR
2020-02-17 10:42:59 -08:00
AMDGPUPrintfRuntimeBinding.cpp
[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
2019-11-20 15:53:55 +05:30
AMDGPUPromoteAlloca.cpp
[Alignement][NFC] Deprecate untyped CreateAlignedLoad
2020-01-23 13:34:32 +01:00
AMDGPUPropagateAttributes.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AMDGPUPTNote.h
AMDGPURegisterBankInfo.cpp
AMDGPU/GlobalISel: Fix RegBankSelect for G_SHUFFLE_VECTOR
2020-02-17 15:11:25 -05:00
AMDGPURegisterBankInfo.h
AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic
2020-02-17 09:20:13 -05:00
AMDGPURegisterBanks.td
AMDGPU/GlobalISel: Replace handling of boolean values
2020-01-06 18:26:42 -05:00
AMDGPURewriteOutArguments.cpp
[Alignment][NFC] Use Align with CreateAlignedStore
2020-01-23 17:34:32 +01:00
AMDGPUSearchableTables.td
AMDGPU: llvm.amdgcn.writelane is a source of divergence
2020-02-12 09:12:56 +01:00
AMDGPUSubtarget.cpp
[AMDGPU] Always enable XNACK feature when support is explicitly requested
2020-02-14 11:58:58 -08:00
AMDGPUSubtarget.h
[AMDGPU] Add a16 feature to gfx10
2020-02-10 09:04:23 +01:00
AMDGPUTargetMachine.cpp
GlobalISel: Allow running localizer earlier
2020-02-17 11:24:06 -08:00
AMDGPUTargetMachine.h
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp
AMDGPU: Fix divergence analysis of control flow intrinsics
2020-02-05 09:30:54 -08:00
AMDGPUTargetTransformInfo.h
AMDGPU: Analyze divergence of inline asm
2020-02-03 12:42:16 -08:00
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns
2020-01-30 10:55:02 +01:00
AMDGPUUnifyMetadata.cpp
[AMDGPU] Fixes -Wrange-loop-analysis warnings
2019-12-22 19:39:28 +01:00
AMDILCFGStructurizer.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
AMDKernelCodeT.h
BUFInstructions.td
AMDGPU: Don't use separate cache arguments for s_buffer_load node
2020-01-30 14:15:26 -08:00
CaymanInstructions.td
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
2020-02-05 00:24:07 -05:00
CMakeLists.txt
[AMDGPU] Remove AMDGPURegisterInfo
2020-02-11 11:13:38 -08:00
DSInstructions.td
[AMDGPU] Fix DS_WRITE_B32 patterns
2020-02-19 13:42:16 -08:00
EvergreenInstructions.td
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
2020-02-05 00:24:07 -05:00
FLATInstructions.td
AMDGPU/GlobalISel: Fix not using global atomics on gfx9+
2020-01-27 07:42:42 -08:00
GCNDPPCombine.cpp
[AMDGPU][DPP] Corrected DPP combiner
2019-11-20 15:56:45 +03:00
GCNHazardRecognizer.cpp
Make more use of MachineInstr::mayLoadOrStore.
2019-12-19 11:51:52 +00:00
GCNHazardRecognizer.h
GCNILPSched.cpp
Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
2019-10-19 01:31:09 +00:00
GCNIterativeScheduler.cpp
[AMDGPU] Add file headers for few files where it is missing.
2020-01-31 02:06:41 +05:30
GCNIterativeScheduler.h
[AMDGPU] Add file headers for few files where it is missing.
2020-01-31 02:06:41 +05:30
GCNMinRegStrategy.cpp
[AMDGPU] Add file headers for few files where it is missing.
2020-01-31 02:06:41 +05:30
GCNNSAReassign.cpp
AMDGPU/GFX10: Fix NSA reassign pass when operands are undef
2020-02-01 22:41:40 +01:00
GCNProcessors.td
GCNRegBankReassign.cpp
[AMDGPU] Cleanup assumptions about generated subregs
2020-02-06 17:39:24 -08:00
GCNRegPressure.cpp
[AMDGPU] Fix assumption about LaneBitmask content
2020-02-19 09:07:11 -08:00
GCNRegPressure.h
[AMDGPU] Add file headers for few files where it is missing.
2020-01-31 02:06:41 +05:30
GCNSchedStrategy.cpp
[AMDGPU] Use generated RegisterPressureSets enum
2020-02-18 10:34:03 -08:00
GCNSchedStrategy.h
[AMDGPU] Attempt to reschedule withou clustering
2020-01-27 10:27:16 -08:00
LLVMBuild.txt
MIMGInstructions.td
[AMDGPU] Add a16 feature to gfx10
2020-02-10 09:04:23 +01:00
R600.td
R600AsmPrinter.cpp
[MCStreamer] De-capitalize EmitValue EmitIntValue{,InHex}
2020-02-14 23:08:40 -08:00
R600AsmPrinter.h
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
[AMDGPU] Split R600 and GCN subregs
2020-02-10 08:29:56 -08:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
[AMDGPU] Split R600 and GCN subregs
2020-02-10 08:29:56 -08:00
R600FrameLowering.cpp
R600FrameLowering.h
[Alignment][NFC] Deprecate Align::None()
2020-01-24 12:53:58 +01:00
R600InstrFormats.td
R600InstrInfo.cpp
[AMDGPU] Split R600 and GCN subregs
2020-02-10 08:29:56 -08:00
R600InstrInfo.h
Use MCRegister in copyPhysReg
2019-11-11 14:42:33 +05:30
R600Instructions.td
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
2020-02-05 00:24:07 -05:00
R600ISelLowering.cpp
AMDGPU: Move R600 test compatability hack
2020-02-10 10:02:06 -08:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OpenCLImageTypeLoweringPass.cpp
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600Processors.td
R600RegisterInfo.cpp
[TBLGEN] Allow to override RC weight
2020-02-14 15:49:52 -08:00
R600RegisterInfo.h
[TBLGEN] Allow to override RC weight
2020-02-14 15:49:52 -08:00
R600RegisterInfo.td
[TBLGEN] Allow to override RC weight
2020-02-14 15:49:52 -08:00
R600Schedule.td
R700Instructions.td
SIAddIMGInit.cpp
[AMDGPU] Split R600 and GCN subregs
2020-02-10 08:29:56 -08:00
SIAnnotateControlFlow.cpp
AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break
2020-02-03 07:02:05 -08:00
SIDefines.h
SIFixSGPRCopies.cpp
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
2020-02-17 08:33:17 -08:00
SIFixupVectorISel.cpp
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
2020-02-17 08:33:17 -08:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp
AMDGPU: Split denormal mode tracking bits
2020-02-04 10:44:21 -08:00
SIFormMemoryClauses.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
SIFrameLowering.cpp
Reapply "AMDGPU: Cleanup and fix SMRD offset handling"
2020-01-31 06:01:28 -08:00
SIFrameLowering.h
[Alignment][NFC] Deprecate Align::None()
2020-01-24 12:53:58 +01:00
SIInsertSkips.cpp
Resubmit: [AMDGPU] Invert the handling of skip insertion.
2020-01-22 13:18:32 +09:00
SIInsertWaitcnts.cpp
[AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi
2020-01-28 10:52:17 +00:00
SIInstrFormats.td
[AMDGPU] Add a16 feature to gfx10
2020-02-10 09:04:23 +01:00
SIInstrInfo.cpp
Add OffsetIsScalable to getMemOperandWithOffset
2020-02-18 15:53:29 +00:00
SIInstrInfo.h
Add OffsetIsScalable to getMemOperandWithOffset
2020-02-18 15:53:29 +00:00
SIInstrInfo.td
[AMDGPU] Add a16 feature to gfx10
2020-02-10 09:04:23 +01:00
SIInstructions.td
AMDGPU/GlobalISel: Remove outdated comment
2020-02-19 17:32:25 -05:00
SIISelLowering.cpp
[AMDGPU] performCvtF32UByteNCombine - add SHL and SimplifyMultipleUseDemandedBits support
2020-02-19 11:45:57 +00:00
SIISelLowering.h
AMDGPU/GlobalISel: Allow arbitrary global values
2020-02-17 11:32:28 -08:00
SILoadStoreOptimizer.cpp
[AMDGPU] Add a16 feature to gfx10
2020-02-10 09:04:23 +01:00
SILowerControlFlow.cpp
AMDGPU: Fix SI_IF lowering when the save exec reg has terminator uses
2020-02-09 17:59:19 -05:00
SILowerI1Copies.cpp
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
2020-02-17 08:33:17 -08:00
SILowerSGPRSpills.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
SIMachineFunctionInfo.cpp
AMDGPU: Refactor treatment of denormal mode
2019-11-19 19:55:43 +05:30
SIMachineFunctionInfo.h
AMDGPU: Split denormal mode tracking bits
2020-02-04 10:44:21 -08:00
SIMachineScheduler.cpp
[AMDGPU] Use generated RegisterPressureSets enum
2020-02-18 10:34:03 -08:00
SIMachineScheduler.h
[AMDGPU] Use generated RegisterPressureSets enum
2020-02-18 10:34:03 -08:00
SIMemoryLegalizer.cpp
[AMDGPU] Bundle loads before post-RA scheduler
2020-01-24 11:33:38 -08:00
SIModeRegister.cpp
SIOptimizeExecMasking.cpp
AMDGPU: Use Register
2019-12-27 16:53:21 -05:00
SIOptimizeExecMaskingPreRA.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
SIPeepholeSDWA.cpp
Fix unused function warning (PR44808)
2020-02-12 15:12:48 +01:00
SIPostRABundler.cpp
[AMDGPU] Bundle loads before post-RA scheduler
2020-01-24 11:33:38 -08:00
SIPreAllocateWWMRegs.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
SIProgramInfo.h
[AMDGPU] separate accounting for agprs
2019-10-02 00:26:58 +00:00
SIRegisterInfo.cpp
[AMDGPU] Use generated RegisterPressureSets enum
2020-02-18 10:34:03 -08:00
SIRegisterInfo.h
[AMDGPU] Use generated RegisterPressureSets enum
2020-02-18 10:34:03 -08:00
SIRegisterInfo.td
[TBLGEN] Inhibit generation of unneeded psets
2020-02-17 15:38:08 -08:00
SIRemoveShortExecBranches.cpp
[AMDGPU] Don't remove short branches over kills
2020-02-03 09:26:52 +00:00
SISchedule.td
SIShrinkInstructions.cpp
AMDGPU: Limit the search in finding the instruction pattern for v_swap generation.
2020-02-07 11:06:33 -08:00
SIWholeQuadMode.cpp
[AMDGPU] Fix non-deterministic iteration order
2020-02-11 09:19:30 +00:00
SMInstructions.td
AMDGPU/GlobalISel: Select llvm.amdgcn.s.buffer.load
2020-02-17 08:02:40 -08:00
SOPInstructions.td
AMDGPU/GlobalISel: Select G_CTTZ_ZERO_UNDEF
2020-02-12 16:19:46 -08:00
VIInstrFormats.td
VIInstructions.td
VOP1Instructions.td
AMDGPU/GlobalISel: Select G_CTTZ_ZERO_UNDEF
2020-02-12 16:19:46 -08:00
VOP2Instructions.td
[AMDGPU] fixed divergence driven shift operations selection
2020-01-31 20:49:56 +03:00
VOP3Instructions.td
[AMDGPU] fixed divergence driven shift operations selection
2020-01-31 20:49:56 +03:00
VOP3PInstructions.td
AMDGPU/GlobalISel: Select permlane16/permlanex16
2020-01-29 17:55:31 -05:00
VOPCInstructions.td
AMDGPU: Remove VOP3Mods0Clamp0OMod
2020-01-07 15:10:08 -05:00
VOPInstructions.td
[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
2019-09-26 21:06:17 +00:00
84096bbb77