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AArch64
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Add test update for a11d9a1f480f which disables fallbacks.
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2021-07-27 12:16:06 -07:00 |
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AMDGPU
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AMDGPU/GlobalISel: Add a few tests for unaligned truncating stores
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2021-07-27 15:56:41 -04:00 |
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ARC
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ARM
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[Local] Do not introduce a new llvm.trap before unreachable
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2021-07-26 23:33:36 -05:00 |
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AVR
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[AVR] Only support sp, r0 and r1 in llvm.read_register
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2021-07-24 14:03:27 +02:00 |
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BPF
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[BPF] Use elementtype attribute for preserve.array/struct.index intrinsics
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2021-07-17 11:09:18 +02:00 |
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Generic
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[PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX
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2021-07-26 23:21:38 +00:00 |
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Hexagon
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[Local] Do not introduce a new llvm.trap before unreachable
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2021-07-26 23:33:36 -05:00 |
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Inputs
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Lanai
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M68k
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Mips
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[llvm][sve] Lowering for VLS truncating stores
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2021-07-23 14:04:55 +01:00 |
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MIR
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MSP430
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NVPTX
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[NVPTX] Add select(cc,binop(),binop()) fast-math tests
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2021-07-18 15:30:24 +01:00 |
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PowerPC
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[PowerPC] add more testcases for ld_splat; nfc
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2021-07-27 11:45:26 +00:00 |
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RISCV
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[RISCV] Select vector shl by 1 to a vector add.
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2021-07-27 10:57:28 -07:00 |
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SPARC
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SystemZ
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[SystemZ][z/OS] Initial code to generate assembly files on z/OS
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2021-07-27 11:29:15 -04:00 |
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Thumb
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Thumb2
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[ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses
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2021-07-27 09:11:58 +01:00 |
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VE
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WebAssembly
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[WebAssembly] Codegen for extmul SIMD instructions
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2021-07-27 08:41:30 -07:00 |
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WinCFGuard
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WinEH
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X86
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[DebugInfo][InstrRef] Correctly update DBG_PHIs during instr scheduling
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2021-07-27 15:12:46 +01:00 |
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XCore
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