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699d18eb82
Fix assert about using an undefined physical register in machine instruction verify pass. The reason is that register flag undef is missing when doing transformation from If Conversion Pass. ``` Bad machine code: Using an undefined physical register - function: func_65 - basic block: %bb.0 entry (0x10024740738) - instruction: BCLR killed $cr5lt, implicit $lr8, implicit $rm, implicit undef $x3 - operand 0: killed $cr5lt LLVM ERROR: Found 1 machine code errors. ``` There are also other existing testcases with same issue. So I add -verify-machineinstrs option to open verifying. Differential Revision: https://reviews.llvm.org/D55408 llvm-svn: 348566
30 lines
1.1 KiB
LLVM
30 lines
1.1 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-crbits | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-CRB
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define void @_Z8example3iPiS_() #0 {
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entry:
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br i1 undef, label %while.end, label %while.body.lr.ph
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while.body.lr.ph: ; preds = %entry
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br i1 undef, label %while.end, label %while.body
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while.body: ; preds = %while.body, %while.body.lr.ph
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br i1 false, label %while.end, label %while.body, !llvm.loop.vectorize.already_vectorized !0
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while.end: ; preds = %while.body, %while.body.lr.ph, %entry
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ret void
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; CHECK: @_Z8example3iPiS_
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; CHECK: bnelr
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; CHECK-CRB: @_Z8example3iPiS_
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; CHECK-CRB: bclr 12,
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}
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attributes #0 = { noinline nounwind }
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!0 = !{}
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