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3f23d4b8c3
tryLatency compares two sched candidates. For the top zone it prefers the one with lesser depth, but only if that depth is greater than the total latency of the instructions we've already scheduled -- otherwise its latency would be hidden and there would be no stall. Unfortunately it only tests the depth of one of the candidates. This can lead to situations where the TopDepthReduce heuristic does not kick in, but a lower priority heuristic chooses the other candidate, whose depth *is* greater than the already scheduled latency, which causes a stall. The fix is to apply the heuristic if the depth of *either* candidate is greater than the already scheduled latency. All this also applies to the BotHeightReduce heuristic in the bottom zone. Differential Revision: https://reviews.llvm.org/D72392
191 lines
6.4 KiB
LLVM
191 lines
6.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-P9
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define i32 @t(i32 %n, i32 %delta, i32 %a) {
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; CHECK-P9-LABEL: t:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: lis r7, 0
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; CHECK-P9-NEXT: li r6, 0
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; CHECK-P9-NEXT: li r8, 0
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; CHECK-P9-NEXT: li r9, 0
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; CHECK-P9-NEXT: ori r7, r7, 65535
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; CHECK-P9-NEXT: .p2align 5
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; CHECK-P9-NEXT: .LBB0_1: # %header
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: addi r9, r9, 1
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; CHECK-P9-NEXT: cmpw r9, r3
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; CHECK-P9-NEXT: blt cr0, .LBB0_4
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; CHECK-P9-NEXT: # %bb.2: # %cont
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: add r8, r8, r4
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; CHECK-P9-NEXT: cmpw r8, r7
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; CHECK-P9-NEXT: bgt cr0, .LBB0_1
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; CHECK-P9-NEXT: # %bb.3: # %cont.1
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; CHECK-P9-NEXT: addi r6, r5, 1024
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; CHECK-P9-NEXT: .LBB0_4: # %return
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; CHECK-P9-NEXT: addi r3, r5, 1024
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; CHECK-P9-NEXT: mullw r3, r6, r3
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; CHECK-P9-NEXT: blr
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entry:
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br label %header
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header:
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%sum = phi i32 [ 0, %entry ], [ %sum.1, %cont ]
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%i = phi i32 [ 0, %entry ], [ %i.1, %cont ]
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%i.1 = add nsw i32 %i, 1
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%lt = icmp slt i32 %i.1, %n
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br i1 %lt, label %return, label %cont
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cont:
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%sum.1 = add nsw i32 %sum, %delta
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%lt.1 = icmp slt i32 %sum.1, 65536
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br i1 %lt.1, label %cont.1, label %header
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cont.1:
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%delta.1 = add nsw i32 %a, 1024
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br label %return
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return:
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%delta.2 = phi i32 [ %delta.1, %cont.1 ], [ 0, %header ]
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%delta.3 = add nsw i32 %a, 1024
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%ret = mul i32 %delta.2, %delta.3
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ret i32 %ret
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}
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define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) nounwind {
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; CHECK-P9-LABEL: foo:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: mflr r0
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; CHECK-P9-NEXT: std r27, -40(r1) # 8-byte Folded Spill
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; CHECK-P9-NEXT: std r28, -32(r1) # 8-byte Folded Spill
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; CHECK-P9-NEXT: std r29, -24(r1) # 8-byte Folded Spill
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; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-P9-NEXT: std r0, 16(r1)
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; CHECK-P9-NEXT: stdu r1, -80(r1)
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; CHECK-P9-NEXT: mr r30, r4
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; CHECK-P9-NEXT: mr r29, r3
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; CHECK-P9-NEXT: lis r3, 21845
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; CHECK-P9-NEXT: add r28, r30, r29
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; CHECK-P9-NEXT: ori r27, r3, 21846
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; CHECK-P9-NEXT: b .LBB1_4
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; CHECK-P9-NEXT: .p2align 4
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; CHECK-P9-NEXT: .LBB1_1: # %sw.bb3
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: mulli r3, r30, 23
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; CHECK-P9-NEXT: .LBB1_2: # %sw.epilog
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: add r28, r3, r28
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; CHECK-P9-NEXT: .LBB1_3: # %sw.epilog
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: cmpwi r28, 1025
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; CHECK-P9-NEXT: bge cr0, .LBB1_7
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; CHECK-P9-NEXT: .LBB1_4: # %while.cond
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: extsw r3, r29
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; CHECK-P9-NEXT: bl bar
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; CHECK-P9-NEXT: nop
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; CHECK-P9-NEXT: mr r29, r3
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; CHECK-P9-NEXT: extsw r3, r30
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; CHECK-P9-NEXT: bl bar
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; CHECK-P9-NEXT: nop
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; CHECK-P9-NEXT: mr r30, r3
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; CHECK-P9-NEXT: mulhw r3, r28, r27
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; CHECK-P9-NEXT: srwi r4, r3, 31
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; CHECK-P9-NEXT: add r3, r3, r4
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; CHECK-P9-NEXT: slwi r4, r3, 1
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; CHECK-P9-NEXT: add r3, r3, r4
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; CHECK-P9-NEXT: sub r3, r28, r3
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; CHECK-P9-NEXT: cmplwi r3, 1
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; CHECK-P9-NEXT: beq cr0, .LBB1_1
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; CHECK-P9-NEXT: # %bb.5: # %while.cond
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: cmplwi r3, 0
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; CHECK-P9-NEXT: bne cr0, .LBB1_3
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; CHECK-P9-NEXT: # %bb.6: # %sw.bb
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: mulli r3, r29, 13
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; CHECK-P9-NEXT: b .LBB1_2
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; CHECK-P9-NEXT: .LBB1_7: # %while.end
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; CHECK-P9-NEXT: lis r3, -13108
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; CHECK-P9-NEXT: lis r4, 13107
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; CHECK-P9-NEXT: ori r3, r3, 52429
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; CHECK-P9-NEXT: ori r4, r4, 13108
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; CHECK-P9-NEXT: mullw r3, r28, r3
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; CHECK-P9-NEXT: cmplw r3, r4
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; CHECK-P9-NEXT: blt cr0, .LBB1_9
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; CHECK-P9-NEXT: # %bb.8: # %if.then8
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; CHECK-P9-NEXT: mulli r3, r29, 13
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; CHECK-P9-NEXT: mulli r5, r30, 23
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; CHECK-P9-NEXT: extsw r4, r28
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; CHECK-P9-NEXT: extsw r3, r3
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; CHECK-P9-NEXT: extsw r5, r5
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; CHECK-P9-NEXT: sub r3, r4, r3
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; CHECK-P9-NEXT: sub r4, r5, r4
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; CHECK-P9-NEXT: rldicl r3, r3, 1, 63
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; CHECK-P9-NEXT: rldicl r4, r4, 1, 63
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; CHECK-P9-NEXT: or r3, r3, r4
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; CHECK-P9-NEXT: b .LBB1_10
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; CHECK-P9-NEXT: .LBB1_9: # %cleanup20
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; CHECK-P9-NEXT: li r3, 0
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; CHECK-P9-NEXT: .LBB1_10: # %cleanup20
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; CHECK-P9-NEXT: addi r1, r1, 80
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; CHECK-P9-NEXT: ld r0, 16(r1)
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; CHECK-P9-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-P9-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
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; CHECK-P9-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
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; CHECK-P9-NEXT: mtlr r0
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; CHECK-P9-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
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; CHECK-P9-NEXT: blr
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entry:
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%add = add nsw i32 %y, %x
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br label %while.cond
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while.cond: ; preds = %sw.epilog, %entry
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%sum.0 = phi i32 [ %add, %entry ], [ %sum.1, %sw.epilog ]
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%y.addr.0 = phi i32 [ %y, %entry ], [ %call1, %sw.epilog ]
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%x.addr.0 = phi i32 [ %x, %entry ], [ %call, %sw.epilog ]
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%call = tail call signext i32 @bar(i32 signext %x.addr.0) #2
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%call1 = tail call signext i32 @bar(i32 signext %y.addr.0) #2
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%rem = srem i32 %sum.0, 3
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switch i32 %rem, label %sw.epilog [
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i32 0, label %sw.bb
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i32 1, label %sw.bb3
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]
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sw.bb: ; preds = %while.cond
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%mul = mul nsw i32 %call, 13
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%add2 = add nsw i32 %mul, %sum.0
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br label %sw.epilog
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sw.bb3: ; preds = %while.cond
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%mul4 = mul nsw i32 %call1, 23
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%add5 = add nsw i32 %mul4, %sum.0
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br label %sw.epilog
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sw.epilog: ; preds = %while.cond, %sw.bb3, %sw.bb
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%sum.1 = phi i32 [ %sum.0, %while.cond ], [ %add5, %sw.bb3 ], [ %add2, %sw.bb ]
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%cmp = icmp slt i32 %sum.1, 1025
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br i1 %cmp, label %while.cond, label %while.end
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while.end: ; preds = %sw.epilog
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%rem739 = urem i32 %sum.1, 5
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%tobool = icmp eq i32 %rem739, 0
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br i1 %tobool, label %cleanup20, label %if.then8
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if.then8: ; preds = %while.end
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%mul9 = mul nsw i32 %call, 13
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%cmp11 = icmp slt i32 %sum.1, %mul9
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%mul10 = mul nsw i32 %call1, 23
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%cmp12 = icmp sgt i32 %sum.1, %mul10
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%or.cond = or i1 %cmp11, %cmp12
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%spec.select = zext i1 %or.cond to i32
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ret i32 %spec.select
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cleanup20: ; preds = %while.end
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ret i32 0
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}
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declare signext i32 @bar(i32 signext) local_unnamed_addr #1
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