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abe534c781
Summary: Currently Shrinkwrap is not enabled on AIX. This patch enables shrink wrap on 32 and 64 bit AIX, and 64 bit ELF. Reviewed By: sfertile, nemanjai Differential Revision: https://reviews.llvm.org/D95094
54 lines
2.1 KiB
LLVM
54 lines
2.1 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck %s --check-prefixes=CHECK,CHECK64
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECK,CHECK32
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECK,CHECK64
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define signext i32 @shrinkwrapme(i32 signext %a, i32 signext %lim) {
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entry:
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%cmp5 = icmp sgt i32 %lim, 0
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br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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%Ret.0.lcssa = phi i32 [ 0, %entry ], [ %0, %for.cond.cleanup.loopexit ]
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ret i32 %Ret.0.lcssa
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for.body: ; preds = %for.body.preheader, %for.body
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%i.07 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%Ret.06 = phi i32 [ %0, %for.body ], [ 0, %for.body.preheader ]
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%0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"(i32 %a, i32 %Ret.06)
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%inc = add nuw nsw i32 %i.07, 1
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%exitcond = icmp eq i32 %inc, %lim
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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; CHECK-LABEL: {{[\.]?}}shrinkwrapme:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpwi
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; Prolog code
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; CHECK64-COUNT-18: std
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; CHECK32-COUNT-18: stw
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; CHECK: blt 0, {{.*}}BB0_3
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; CHECK: # %bb.1:
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; CHECK: li
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; CHECK: {{.*}}BB0_2:
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; CHECK: add
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; CHECK: bdnz {{.*}}BB0_2
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; CHECK-NEXT: b {{.*}}BB0_4
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; CHECK: {{.*}}BB0_3:
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; CHECK-NEXT: li
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; CHECK: {{.*}}BB0_4:
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; Epilog code
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; CHECK64-COUNT-18: ld
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;
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; CHECK32-COUNT-18: lwz
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; CHECK: blr
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}
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