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llvm-mirror/test/CodeGen/SystemZ/soft-float-inline-asm-04.ll
Jonas Paulsson 0b10273a90 [SystemZ] Improve handling of inline asm constraints.
The "{=v0}" constraint did not result in the expected error message in the
abscence of the vector facility, because 'v0' matches as a string into the
AnyRegBitRegClass in common code.

This patch adds checks for vector support in case of "{v" and soft-float in
case of "{f" to remedy this.

Review: Ulrich Weigand.
2020-02-05 17:04:16 -05:00

11 lines
338 B
LLVM

; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -mattr=soft-float -O3 2>&1 | FileCheck %s
;
; Verify that inline asms cannot use fp/vector registers with soft-float.
define <2 x i64> @f1() {
%ret = call <2 x i64> asm "", "={v0}" ()
ret <2 x i64> %ret
}
; CHECK: error: couldn't allocate output register for constraint '{v0}'