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llvm-mirror/test/CodeGen
Simon Pilgrim d2e5703e8b [X86][SSE] Allow target shuffle combining to match masks with SM_Sentinel values
We currently only allow exact matches of shuffle mask patterns during target shuffle combining.

This patch relaxes this to permit SM_SentinelUndef in the combined shuffle to always be accepted as well as allowing exact matching of the SM_SentinelZero value.

I've adjusted some tests that were requiring exact shuffle masks to now include undef values.

Differential Revision: http://reviews.llvm.org/D21495

llvm-svn: 273119
2016-06-19 18:03:52 +00:00
..
AArch64 AArch64: allow MOV (imm) alias to be printed 2016-06-16 01:42:25 +00:00
AMDGPU AMDGPU: Fix kernel argument alignment impacting stack size 2016-06-18 05:15:53 +00:00
ARM ARM: take account of possible bundle when erasing an instruction. 2016-06-17 18:40:46 +00:00
BPF
Generic
Hexagon
Inputs
Lanai
Mips [mips] Emit a JALR with $rd equal to $zero, instead of a JR in MIPS32R6. 2016-06-18 15:39:43 +00:00
MIR [mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores. 2016-06-16 10:20:59 +00:00
MSP430
NVPTX
PowerPC IR: Introduce local_unnamed_addr attribute. 2016-06-14 21:01:22 +00:00
SPARC [SPARC[ Correcting out-of-date unit tests checked in as part of r273108 2016-06-19 12:52:39 +00:00
SystemZ [SelectionDAG] Don't treat library calls specially if marked with nobuiltin. 2016-06-17 20:24:07 +00:00
Thumb [Thumb] Fix off-by-one error in r272007 2016-06-14 13:33:07 +00:00
Thumb2 Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
WebAssembly
WinEH
X86 [X86][SSE] Allow target shuffle combining to match masks with SM_Sentinel values 2016-06-19 18:03:52 +00:00
XCore