Saleem Abdulrasool 1a40ebc0d6 ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions ... The implicit immediate 0 forms are assembly aliases, not distinct instruction encodings. Fix the initial implementation introduced in r198914 to an alias to avoid two separate instruction definitions for the same encoding. An InstAlias is insufficient in this case as the necessary due to the need to add a new additional operand for the implicit zero. By using the AsmPsuedoInst, fall back to the C++ code to transform the instruction to the equivalent _POST_IMM form, inserting the additional implicit immediate 0. llvm-svn: 199032		2014-01-12 04:36:01 +00:00
..
addrmode2-reencoding.txt	ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions	2014-01-12 04:36:01 +00:00
arm-LDREXD-reencoding.txt
arm-STREXD-reencoding.txt
arm-tests.txt
arm-thumb-trustzone.txt
arm-trustzone.txt
basic-arm-instructions-v8.txt	[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)	2013-11-08 16:16:30 +00:00
basic-arm-instructions.txt	[ARM] Introduce the 'sevl' instruction in ARMv8.	2013-10-01 12:39:11 +00:00
crc32-thumb.txt	'svn add' the test cases.	2013-09-18 09:46:49 +00:00
crc32.txt	'svn add' the test cases.	2013-09-18 09:46:49 +00:00
fp-armv8.txt	[ARM] Add support for MVFR2 which is new in ARMv8	2013-11-11 19:56:13 +00:00
fp-encoding.txt
hex-immediates.txt
invalid-armv7.txt	[ARM] Introduce the 'sevl' instruction in ARMv8.	2013-10-01 12:39:11 +00:00
invalid-armv8.txt	[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)	2013-11-08 16:17:14 +00:00
invalid-because-armv7.txt	[ARM] Add support for MVFR2 which is new in ARMv8	2013-11-11 19:56:13 +00:00
invalid-FSTMX-arm.txt
invalid-IT-CC15.txt
invalid-thumbv7-xfail.txt
invalid-thumbv7.txt	ARM: provide diagnostics on more writeback LDM/STM instructions	2013-10-22 19:00:39 +00:00
invalid-thumbv8.txt	[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings)	2013-11-08 16:25:50 +00:00
ldrd-armv4.txt
lit.local.cfg	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
load-store-acquire-release-v8-thumb.txt	[ARMv8] Add MC support for the new load/store acquire/release instructions.	2013-08-27 17:38:16 +00:00
load-store-acquire-release-v8.txt	[ARMv8] Add MC support for the new load/store acquire/release instructions.	2013-08-27 17:38:16 +00:00
marked-up-thumb.txt
memory-arm-instructions.txt
neon-crypto.txt	[ARMv8] Add support for the v8 cryptography extensions.	2013-09-19 11:59:01 +00:00
neon-tests.txt
neon-v8.txt
neon.txt
neont2.txt
neont-VLD-reencoding.txt
neont-VST-reencoding.txt
thumb1.txt
thumb2-v8.txt	[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings)	2013-11-08 16:25:50 +00:00
thumb2.txt	Make ARM hint ranges consistent, and add tests for these ranges	2013-10-23 10:14:40 +00:00
thumb-fp-armv8.txt	Fix tests for hasFPARMv8 name change (r190692)	2013-09-13 14:37:52 +00:00
thumb-MSR-MClass.txt
thumb-neon-crypto.txt	[ARM] NEON instructions were erroneously decoded from certain invalid encodings	2013-10-30 18:10:09 +00:00
thumb-neon-v8.txt
thumb-printf.txt
thumb-tests.txt
thumb-v8.txt	[ARMv8] Add some missing tests for DSB/DMB.	2013-09-05 16:05:45 +00:00
unpredictable-ADC-arm.txt
unpredictable-ADDREXT3-arm.txt
unpredictable-AExtI-arm.txt
unpredictable-AI1cmp-arm.txt
unpredictable-BFI.txt
unpredictable-LDR-arm.txt
unpredictable-LDRD-arm.txt
unpredictable-LSL-regform.txt
unpredictable-MRRC2-arm.txt
unpredictable-MRS-arm.txt
unpredictable-MUL-arm.txt
unpredictable-RSC-arm.txt
unpredictable-SEL-arm.txt
unpredictable-SHADD16-arm.txt
unpredictable-SSAT-arm.txt
unpredictable-STRBrs-arm.txt
unpredictable-swp-arm.txt
unpredictable-UQADD8-arm.txt
unpredictables-thumb.txt
vfp4.txt