Matthias Braun 0243836cdd LiveRegUnits: Add accumulateBackward() function ... Re-Commit r292543 with a fix for the situation when the chain end is MBB.end(). This function can be used to accumulate the set of all read and modified register in a sequence of instructions. Use this code in AArch64A57FPLoadBalancing::scavengeRegister() to prove the concept. - The AArch64A57LoadBalancing code is using a backwards analysis now which is irrespective of kill flags. This is the main motivation for this change. Differential Revision: http://reviews.llvm.org/D22082 llvm-svn: 292705		2017-01-21 02:21:04 +00:00
..
AsmParser	[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).	2017-01-06 00:30:53 +00:00
Disassembler	[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).	2017-01-06 00:30:53 +00:00
InstPrinter
MCTargetDesc	[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).	2017-01-06 00:30:53 +00:00
TargetInfo	Move the global variables representing each Target behind accessor function	2016-10-09 23:00:34 +00:00
Utils
AArch64.h	[AArch64] Avoid generating indexed vector instructions for Exynos	2016-10-08 12:30:07 +00:00
AArch64.td	Re-commit: [globalisel] Tablegen-erate current Register Bank Information	2017-01-19 11:15:55 +00:00
AArch64A53Fix835769.cpp	Use StringRef in Pass/PassManager APIs (NFC)	2016-10-01 02:56:57 +00:00
AArch64A57FPLoadBalancing.cpp	LiveRegUnits: Add accumulateBackward() function	2017-01-21 02:21:04 +00:00
AArch64AddressTypePromotion.cpp	Use StringRef in Pass/PassManager APIs (NFC)	2016-10-01 02:56:57 +00:00
AArch64AdvSIMDScalarPass.cpp	Use StringRef in Pass/PassManager APIs (NFC)	2016-10-01 02:56:57 +00:00
AArch64AsmPrinter.cpp	[XRay] Merge instrumentation point table emission code into AsmPrinter.	2017-01-03 04:30:21 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CallLowering.cpp	GlobalISel: add callseq instructions to record stack usage	2017-01-17 22:43:34 +00:00
AArch64CallLowering.h	Apply clang-tidy's performance-unnecessary-value-param to LLVM.	2017-01-13 14:39:03 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp	Use StringRef in Pass/PassManager APIs (NFC)	2016-10-01 02:56:57 +00:00
AArch64CollectLOH.cpp	AArch64CollectLOH: Rewrite as block-local analysis.	2017-01-06 19:22:01 +00:00
AArch64ConditionalCompares.cpp	[CodeGen] Rename MachineInstrBuilder::addOperand. NFC	2017-01-13 09:58:52 +00:00
AArch64ConditionOptimizer.cpp	[CodeGen] Rename MachineInstrBuilder::addOperand. NFC	2017-01-13 09:58:52 +00:00
AArch64DeadRegisterDefinitionsPass.cpp	AArch64: Use DeadRegisterDefinitionsPass before regalloc.	2016-11-16 03:38:27 +00:00
AArch64ExpandPseudoInsts.cpp	[AArch64] Generate literals by the little end	2017-01-18 18:57:08 +00:00
AArch64FastISel.cpp	IR: Change the gep_type_iterator API to avoid always exposing the "current" type.	2016-12-02 02:24:42 +00:00
AArch64FrameLowering.cpp	[CodeGen] Rename MachineInstrBuilder::addOperand. NFC	2017-01-13 09:58:52 +00:00
AArch64FrameLowering.h
AArch64GenRegisterBankInfo.def	Re-commit: [globalisel] Tablegen-erate current Register Bank Information	2017-01-19 11:15:55 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td	[AArch64] Falkor supports Rounding Double Multiply Add/Subtract instructions.	2017-01-16 16:28:43 +00:00
AArch64InstrInfo.cpp	[AArch64] Generate literals by the little end	2017-01-18 18:57:08 +00:00
AArch64InstrInfo.h	[AArch64] Fold some filled/spilled subreg COPYs	2017-01-05 21:51:42 +00:00
AArch64InstrInfo.td	[AArch64] Generate literals by the little end	2017-01-18 18:57:08 +00:00
AArch64InstructionSelector.cpp	[GlobalISel] Pointers are legal operands for G_SELECT on AArch64	2017-01-19 13:32:14 +00:00
AArch64InstructionSelector.h	[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).	2017-01-06 00:30:53 +00:00
AArch64ISelDAGToDAG.cpp	[AArch64] Fix useful bits detection for BFM instructions	2016-11-30 17:04:22 +00:00
AArch64ISelLowering.cpp	[AArch64] Add support for lowering bitreverse to the rbit instruction.	2017-01-10 17:20:33 +00:00
AArch64ISelLowering.h	[AArch64] allow and-not-compare transform to form 'bics'	2016-11-29 22:28:58 +00:00
AArch64LegalizerInfo.cpp	[AArch64][GlobalISel] Widen scalar int->fp conversions.	2017-01-20 01:37:24 +00:00
AArch64LegalizerInfo.h	GlobalISel: rename legalizer components to match others.	2016-10-14 22:18:18 +00:00
AArch64LoadStoreOptimizer.cpp	AArch64LoadStoreOptimizer: Update kill flags when merging stores	2017-01-20 18:04:27 +00:00
AArch64MachineFunctionInfo.h	[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).	2017-01-06 00:30:53 +00:00
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp	Use StringRef in Pass/PassManager APIs (NFC)	2016-10-01 02:56:57 +00:00
AArch64RedundantCopyElimination.cpp	Use StringRef in Pass/PassManager APIs (NFC)	2016-10-01 02:56:57 +00:00
AArch64RegisterBankInfo.cpp	Re-commit: [globalisel] Tablegen-erate current Register Bank Information	2017-01-19 11:15:55 +00:00
AArch64RegisterBankInfo.h	Re-commit: [globalisel] Tablegen-erate current Register Bank Information	2017-01-19 11:15:55 +00:00
AArch64RegisterBanks.td	Re-commit: [globalisel] Tablegen-erate current Register Bank Information	2017-01-19 11:15:55 +00:00
AArch64RegisterInfo.cpp	Clarify rules for reserved regs, fix aarch64 ones.	2016-11-30 22:17:10 +00:00
AArch64RegisterInfo.h	AArch64: Enable post-ra liveness updates	2016-12-16 23:55:43 +00:00
AArch64RegisterInfo.td	[AArch64] Corrected spill size for DDD register class. NFCI	2016-10-21 09:53:42 +00:00
AArch64SchedA53.td
AArch64SchedA57.td	[AArch64] Cortex-A57 FDIV/FSQRT scheduling fix (W-unit)	2016-12-23 12:51:41 +00:00
AArch64SchedA57WriteRes.td	[AArch64] Cortex-A57 FDIV/FSQRT scheduling fix (W-unit)	2016-12-23 12:51:41 +00:00
AArch64SchedCyclone.td
AArch64SchedFalkor.td	[AArch64] Add a basic SchedMachineModel for Falkor.	2016-11-29 20:00:27 +00:00
AArch64SchedKryo.td
AArch64SchedKryoDetails.td
AArch64SchedM1.td
AArch64Schedule.td
AArch64SchedVulcan.td	[AArch64] Maximize 80-column. NFC.	2016-11-22 14:12:09 +00:00
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp	Use StringRef in Pass/PassManager APIs (NFC)	2016-10-01 02:56:57 +00:00
AArch64Subtarget.cpp	[AArch64] Reduce vector insert/extract cost for Falkor.	2017-01-06 18:03:26 +00:00
AArch64Subtarget.h	[AArch64] Falkor supports Rounding Double Multiply Add/Subtract instructions.	2017-01-16 16:28:43 +00:00
AArch64SystemOperands.td
AArch64TargetMachine.cpp	Re-commit: [globalisel] Tablegen-erate current Register Bank Information	2017-01-19 11:15:55 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp	CodeGen: simplify TargetMachine::getSymbol interface. NFC.	2016-11-22 16:17:20 +00:00
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp	[X86] updating TTI costs for arithmetic instructions on X86\SLM arch.	2017-01-11 08:23:37 +00:00
AArch64TargetTransformInfo.h	[X86] updating TTI costs for arithmetic instructions on X86\SLM arch.	2017-01-11 08:23:37 +00:00
AArch64VectorByElementOpt.cpp	[AArch64] Avoid generating indexed vector instructions for Exynos	2016-10-08 12:30:07 +00:00
CMakeLists.txt	Re-commit: [globalisel] Tablegen-erate current Register Bank Information	2017-01-19 11:15:55 +00:00
LLVMBuild.txt