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6dcbcbb6e8
This is a partial revert of r244615 (http://reviews.llvm.org/D11942), which caused a major regression in debug info quality. Turning the artificial __MergedGlobal symbols into private symbols (l__MergedGlobal) means that the linker will not include them in the symbol table of the final executable. Without a symbol table entry dsymutil is not be able to process the debug info for any of the merged globals and thus drops the debug info for all of them. This patch is enabling the old behavior for all MachO targets while leaving all other targets unaffected. rdar://problem/29160481 https://reviews.llvm.org/D26531 llvm-svn: 286607
75 lines
2.2 KiB
LLVM
75 lines
2.2 KiB
LLVM
; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false \
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; RUN: -aarch64-enable-collect-loh=false -O1 -global-merge-group-by-use \
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; RUN: -global-merge-ignore-single-use %s -o - | FileCheck %s
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; Check that, at -O1, we only merge globals used in minsize functions.
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; We assume that globals of the same size aren't reordered inside a set.
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; We use -global-merge-ignore-single-use, and thus only expect one merged set.
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@m1 = internal global i32 0, align 4
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@n1 = internal global i32 0, align 4
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; CHECK-LABEL: f1:
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define void @f1(i32 %a1, i32 %a2) minsize nounwind {
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; CHECK-NEXT: adrp x8, [[SET:__MergedGlobals]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m1, align 4
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store i32 %a2, i32* @n1, align 4
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ret void
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}
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@m2 = internal global i32 0, align 4
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@n2 = internal global i32 0, align 4
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; CHECK-LABEL: f2:
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define void @f2(i32 %a1, i32 %a2) nounwind {
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; CHECK-NEXT: adrp x8, _m2@PAGE
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; CHECK-NEXT: adrp x9, _n2@PAGE
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; CHECK-NEXT: str w0, [x8, _m2@PAGEOFF]
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; CHECK-NEXT: str w1, [x9, _n2@PAGEOFF]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m2, align 4
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store i32 %a2, i32* @n2, align 4
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ret void
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}
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; If we have use sets partially overlapping between a minsize and a non-minsize
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; function, explicitly check that we only consider the globals used in the
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; minsize function for merging.
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@m3 = internal global i32 0, align 4
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@n3 = internal global i32 0, align 4
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; CHECK-LABEL: f3:
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define void @f3(i32 %a1, i32 %a2) minsize nounwind {
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; CHECK-NEXT: adrp x8, [[SET]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8, #8]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m3, align 4
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store i32 %a2, i32* @n3, align 4
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ret void
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}
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@n4 = internal global i32 0, align 4
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; CHECK-LABEL: f4:
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define void @f4(i32 %a1, i32 %a2) nounwind {
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; CHECK-NEXT: adrp x8, [[SET]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
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; CHECK-NEXT: adrp x9, _n4@PAGE
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; CHECK-NEXT: str w0, [x8, #8]
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; CHECK-NEXT: str w1, [x9, _n4@PAGEOFF]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m3, align 4
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store i32 %a2, i32* @n4, align 4
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ret void
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}
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; CHECK-DAG: .zerofill __DATA,__bss,[[SET]],16,3
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; CHECK-DAG: .zerofill __DATA,__bss,_m2,4,2
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; CHECK-DAG: .zerofill __DATA,__bss,_n2,4,2
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; CHECK-DAG: .zerofill __DATA,__bss,_n4,4,2
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