Simon Pilgrim d47bdd1bd0 [TargetLowering] SimplifyMultipleUseDemandedBits - drop already extended ISD::SIGN_EXTEND_INREG nodes. ...

If the source of the SIGN_EXTEND_INREG node is already sign extended, use the source directly.

2020-06-18 16:41:08 +01:00

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AArch64

[SVE] Add checks for no warnings in SVE tests

2020-06-18 13:18:01 +01:00

AMDGPU

AMDGPU: Don't use 16-bit FP inline constants in integer operands

2020-06-17 19:14:10 -04:00

ARC

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ARM

[ARM] Moving CMSE handling of half arguments and return to the backend

2020-06-18 13:16:29 +01:00

AVR

[AVR] Fix miscompilation of zext + add

2020-06-18 16:51:37 +02:00

BPF

[BPF] fix a bug for BTF pointee type pruning

2020-06-17 15:13:46 -07:00

Generic

[LLParser] Delete temp CallInst when error occurs

2020-06-16 11:41:25 +08:00

Hexagon

Simplify MachineVerifier's block-successor verification.

2020-06-06 22:30:51 -04:00

Inputs

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Lanai

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Mips

[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))

2020-06-12 13:53:08 -04:00

MIR

[MachineVerifier] Verify that a DBG_VALUE has a debug location

2020-05-28 13:53:40 -07:00

MSP430

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NVPTX

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PowerPC

[PowerPC] Don't convert Loop to CTR Loop for fp128 BinaryOperator

2020-06-18 02:54:19 +00:00

RISCV

[RISCV64] Emit correct lib call for fp(float/double) to ui/si

2020-06-18 19:34:16 +05:30

SPARC

[SPARC] Lower fp16 ops to libcalls

2020-06-10 19:15:26 -07:00

SystemZ

[SystemZ] Bugfix in storeLoadCanUseBlockBinary().

2020-06-17 09:49:31 +02:00

Thumb

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Thumb2

[ARM] Supporting lowering of half-precision FP arguments and returns in AArch32's backend

2020-06-18 13:15:13 +01:00

VE

[VE] Support relocation information in MC layer

2020-06-15 11:24:53 +02:00

WebAssembly

[WebAssembly] MC: Fix for data aliases with offsets (getelementptr)

2020-06-17 16:25:50 -07:00

WinCFGuard

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WinEH

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X86

[TargetLowering] SimplifyMultipleUseDemandedBits - drop already extended ISD::SIGN_EXTEND_INREG nodes.

2020-06-18 16:41:08 +01:00

XCore

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