1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
llvm-mirror/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt
Tim Northover b82f729eb5 ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
These instructions aren't universally available, but depend on a specific
extension to the normal ARM architecture (rather than, say, v6/v7/...) so a new
feature is appropriate.

This also enables the feature by default on A-class cores which usually have
these extensions, to avoid breaking existing code and act as a sensible
default.

llvm-svn: 179171
2013-04-10 12:08:35 +00:00

18 lines
560 B
Plaintext

# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ
# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ
#------------------------------------------------------------------------------
# SMC
#------------------------------------------------------------------------------
0xff 0xf7 0x00 0x80
0x0c 0xbf
0xf0 0xf7 0x00 0x80
# NOTZ-NOT: smc #15
# NOTZ-NOT: smceq #0
# TZ: smc #15
# TZ: ite eq
# TZ: smceq #0