Fraser Cormack 1baf7d8c9b [RISCV] Fix failing RVV MC tests ... I believe these failures were introduced by D103790's changes to the VType formatting found in vsetvli/vsetivli instructions.		2021-06-09 09:47:18 +01:00
..
add.s	[RISCV] Update V instructions constraints to conform to v1.0	2021-01-22 01:15:55 +08:00
aliases.s	Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases"	2021-05-29 15:11:37 +01:00
and.s
clip.s
compare.s	Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper Differential Revision : https://reviews.llvm.org/D100115	2021-04-14 06:41:59 +08:00
convert.s	[RISCV] Update V instructions constraints to conform to v1.0	2021-01-22 01:15:55 +08:00
div.s
ext.s
fadd.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fcompare.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fdiv.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fmacc.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fminmax.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fmul.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fmv.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fothers.s	Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases"	2021-05-29 15:11:37 +01:00
freduction.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
fsub.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
invalid.s	[RISCV] Have assembler check that the temp register is different than dest register for vmsgeu.vx pseudo.	2021-04-23 09:33:29 -07:00
load.s	Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases"	2021-05-29 15:11:37 +01:00
macc.s
mask.s
minmax.s
mul.s
mv.s
or.s
others.s	Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases"	2021-05-29 15:11:37 +01:00
reduction.s
shift.s	[RISCV] Update V instructions constraints to conform to v1.0	2021-01-22 01:15:55 +08:00
sign-injection.s	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
snippet.s	[RISCV] Fix failing RVV MC tests	2021-06-09 09:47:18 +01:00
store.s	Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases"	2021-05-29 15:11:37 +01:00
sub.s	[RISCV] Update V instructions constraints to conform to v1.0	2021-01-22 01:15:55 +08:00
vsetvl.s	[RISCV] Fix failing RVV MC tests	2021-06-09 09:47:18 +01:00
xor.s
zvamo.s	[RISCV][NFC] Fix formatting	2021-04-09 14:41:09 +08:00
zvlsseg.s	Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases"	2021-05-29 15:11:37 +01:00