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55 lines
2.4 KiB
LLVM
55 lines
2.4 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOHSA %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA %s
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@private1 = private unnamed_addr addrspace(4) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0]
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@private2 = private unnamed_addr addrspace(4) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0]
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@available_externally = available_externally addrspace(4) global [256 x i32] zeroinitializer
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; GCN-LABEL: {{^}}private_test:
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; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
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; Non-HSA OSes use fixup into .text section.
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; NOHSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1
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; NOHSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], 0
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; HSA OSes use relocations.
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; HSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1@rel32@lo+4
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; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], private1@rel32@hi+4
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; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}}
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; Non-HSA OSes use fixup into .text section.
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; NOHSA: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2
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; NOHSA: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0
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; HSA OSes use relocations.
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; HSA: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2@rel32@lo+4
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; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], private2@rel32@hi+4
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define amdgpu_kernel void @private_test(i32 %index, float addrspace(1)* %out) {
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%ptr = getelementptr [4 x float], [4 x float] addrspace(4) * @private1, i32 0, i32 %index
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%val = load float, float addrspace(4)* %ptr
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store volatile float %val, float addrspace(1)* %out
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%ptr2 = getelementptr [4 x float], [4 x float] addrspace(4) * @private2, i32 0, i32 %index
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%val2 = load float, float addrspace(4)* %ptr2
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store volatile float %val2, float addrspace(1)* %out
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ret void
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}
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; HSA-LABEL: {{^}}available_externally_test:
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; HSA: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
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; HSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], available_externally@gotpcrel32@lo+4
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; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], available_externally@gotpcrel32@hi+4
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define amdgpu_kernel void @available_externally_test(i32 addrspace(1)* %out) {
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%ptr = getelementptr [256 x i32], [256 x i32] addrspace(4)* @available_externally, i32 0, i32 1
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%val = load i32, i32 addrspace(4)* %ptr
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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; NOHSA: .text
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; HSA: .section .rodata
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; GCN: private1:
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; GCN: private2:
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