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c32fcd8c26
Add this option for debugging and providing workaround. By default it is off so no behavior change in backend. Differential Revision: https://reviews.llvm.org/D54158 llvm-svn: 346267
68 lines
3.5 KiB
LLVM
68 lines
3.5 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck %s
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; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca -disable-promote-alloca-to-lds< %s | FileCheck -check-prefix=NOLDS %s
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; This normally would be fixed by instcombine to be compare to the GEP
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; indices
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; NOLDS-NOT: addrspace(3)
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; CHECK-LABEL: @lds_promoted_alloca_icmp_same_derived_pointer(
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; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promoted_alloca_icmp_same_derived_pointer.alloca, i32 0, i32 %{{[0-9]+}}
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; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %a
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; CHECK: %ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %b
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; CHECK: %cmp = icmp eq i32 addrspace(3)* %ptr0, %ptr1
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define amdgpu_kernel void @lds_promoted_alloca_icmp_same_derived_pointer(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
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%alloca = alloca [16 x i32], align 4
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
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%ptr1 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %b
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%cmp = icmp eq i32* %ptr0, %ptr1
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%zext = zext i1 %cmp to i32
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store volatile i32 %zext, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: @lds_promoted_alloca_icmp_null_rhs(
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; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promoted_alloca_icmp_null_rhs.alloca, i32 0, i32 %{{[0-9]+}}
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; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %a
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; CHECK: %cmp = icmp eq i32 addrspace(3)* %ptr0, null
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define amdgpu_kernel void @lds_promoted_alloca_icmp_null_rhs(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
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%alloca = alloca [16 x i32], align 4
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
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%cmp = icmp eq i32* %ptr0, null
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%zext = zext i1 %cmp to i32
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store volatile i32 %zext, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: @lds_promoted_alloca_icmp_null_lhs(
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; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promoted_alloca_icmp_null_lhs.alloca, i32 0, i32 %{{[0-9]+}}
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; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %a
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; CHECK: %cmp = icmp eq i32 addrspace(3)* null, %ptr0
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define amdgpu_kernel void @lds_promoted_alloca_icmp_null_lhs(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
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%alloca = alloca [16 x i32], align 4
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
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%cmp = icmp eq i32* null, %ptr0
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%zext = zext i1 %cmp to i32
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store volatile i32 %zext, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: @lds_promoted_alloca_icmp_unknown_ptr(
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; CHECK: %alloca = alloca [16 x i32], align 4
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; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
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; CHECK: %ptr1 = call i32* @get_unknown_pointer()
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; CHECK: %cmp = icmp eq i32* %ptr0, %ptr1
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define amdgpu_kernel void @lds_promoted_alloca_icmp_unknown_ptr(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
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%alloca = alloca [16 x i32], align 4
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
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%ptr1 = call i32* @get_unknown_pointer()
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%cmp = icmp eq i32* %ptr0, %ptr1
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%zext = zext i1 %cmp to i32
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store volatile i32 %zext, i32 addrspace(1)* %out
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ret void
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}
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declare i32* @get_unknown_pointer() #0
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" }
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