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c2a2016825
llvm-svn: 347576
65 lines
2.3 KiB
YAML
65 lines
2.3 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stress-regalloc=1 -start-before=simple-register-coalescing -stop-after=greedy -o - %s | FileCheck %s
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# https://bugs.llvm.org/show_bug.cgi?id=33620
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---
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# This would assert due to the empty live interval created for %9
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# on the last S_NOP with an undef subreg use.
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# CHECK-LABEL: name: expecting_non_empty_interval
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# CHECK: undef %7.sub1:vreg_64 = V_MAC_F32_e32 0, undef %1:vgpr_32, undef %7.sub1, implicit $exec
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# CHECK-NEXT: SI_SPILL_V64_SAVE %7, %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $exec :: (store 8 into %stack.0, align 4, addrspace 5)
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# CHECK-NEXT: undef %5.sub1:vreg_64 = V_MOV_B32_e32 1786773504, implicit $exec
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# CHECK-NEXT: dead %3:vgpr_32 = V_MUL_F32_e32 0, %5.sub1, implicit $exec
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# CHECK: S_NOP 0, implicit %6.sub1
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# CHECK-NEXT: %8:vreg_64 = SI_SPILL_V64_RESTORE %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $exec :: (load 8 from %stack.0, align 4, addrspace 5)
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# CHECK-NEXT: S_NOP 0, implicit %8.sub1
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# CHECK-NEXT: S_NOP 0, implicit undef %9.sub0
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name: expecting_non_empty_interval
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tracksRegLiveness: true
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body: |
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bb.0:
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successors: %bb.1
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undef %0.sub1:vreg_64 = V_MAC_F32_e32 0, undef %1:vgpr_32, undef %0.sub1, implicit $exec
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undef %2.sub1:vreg_64 = V_MOV_B32_e32 1786773504, implicit $exec
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dead %3:vgpr_32 = V_MUL_F32_e32 0, %2.sub1, implicit $exec
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bb.1:
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S_NOP 0, implicit %2.sub1
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S_NOP 0, implicit %0.sub1
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S_NOP 0, implicit undef %0.sub0
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...
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# Similar assert which happens when trying to rematerialize.
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# https://bugs.llvm.org/show_bug.cgi?id=33884
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---
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# CHECK-LABEL: name: rematerialize_empty_interval_has_reference
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# CHECK-NOT: MOV
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# CHECK: undef %1.sub2:vreg_128 = V_MOV_B32_e32 1786773504, implicit $exec
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# CHECK: bb.1:
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# CHECK-NEXT: S_NOP 0, implicit %1.sub2
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# CHECK-NEXT: S_NOP 0, implicit undef %4.sub0
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# CHECK-NEXT: undef %2.sub2:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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# CHECK-NEXT: S_NOP 0, implicit %2.sub2
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name: rematerialize_empty_interval_has_reference
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tracksRegLiveness: true
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body: |
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bb.0:
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successors: %bb.1
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undef %0.sub2:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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undef %1.sub2:vreg_128 = V_MOV_B32_e32 1786773504, implicit $exec
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bb.1:
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S_NOP 0, implicit %1.sub2
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S_NOP 0, implicit undef %0.sub0
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S_NOP 0, implicit %0.sub2
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...
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