mirror of
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529 lines
17 KiB
C++
529 lines
17 KiB
C++
//===- AMDGPUAttributor.cpp -----------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This pass uses Attributor framework to deduce AMDGPU attributes.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "GCNSubtarget.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/IR/IntrinsicsR600.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Transforms/IPO/Attributor.h"
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#define DEBUG_TYPE "amdgpu-attributor"
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using namespace llvm;
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static constexpr StringLiteral ImplicitAttrNames[] = {
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// X ids unnecessarily propagated to kernels.
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"amdgpu-work-item-id-x", "amdgpu-work-item-id-y",
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"amdgpu-work-item-id-z", "amdgpu-work-group-id-x",
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"amdgpu-work-group-id-y", "amdgpu-work-group-id-z",
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"amdgpu-dispatch-ptr", "amdgpu-dispatch-id",
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"amdgpu-queue-ptr", "amdgpu-implicitarg-ptr"};
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// We do not need to note the x workitem or workgroup id because they are always
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// initialized.
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//
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// TODO: We should not add the attributes if the known compile time workgroup
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// size is 1 for y/z.
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static StringRef intrinsicToAttrName(Intrinsic::ID ID, bool &NonKernelOnly,
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bool &IsQueuePtr) {
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switch (ID) {
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case Intrinsic::amdgcn_workitem_id_x:
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NonKernelOnly = true;
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return "amdgpu-work-item-id-x";
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case Intrinsic::amdgcn_workgroup_id_x:
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NonKernelOnly = true;
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return "amdgpu-work-group-id-x";
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case Intrinsic::amdgcn_workitem_id_y:
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case Intrinsic::r600_read_tidig_y:
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return "amdgpu-work-item-id-y";
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case Intrinsic::amdgcn_workitem_id_z:
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case Intrinsic::r600_read_tidig_z:
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return "amdgpu-work-item-id-z";
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case Intrinsic::amdgcn_workgroup_id_y:
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case Intrinsic::r600_read_tgid_y:
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return "amdgpu-work-group-id-y";
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case Intrinsic::amdgcn_workgroup_id_z:
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case Intrinsic::r600_read_tgid_z:
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return "amdgpu-work-group-id-z";
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case Intrinsic::amdgcn_dispatch_ptr:
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return "amdgpu-dispatch-ptr";
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case Intrinsic::amdgcn_dispatch_id:
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return "amdgpu-dispatch-id";
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case Intrinsic::amdgcn_kernarg_segment_ptr:
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return "amdgpu-kernarg-segment-ptr";
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case Intrinsic::amdgcn_implicitarg_ptr:
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return "amdgpu-implicitarg-ptr";
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case Intrinsic::amdgcn_queue_ptr:
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case Intrinsic::amdgcn_is_shared:
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case Intrinsic::amdgcn_is_private:
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// TODO: Does not require queue ptr on gfx9+
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case Intrinsic::trap:
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case Intrinsic::debugtrap:
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IsQueuePtr = true;
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return "amdgpu-queue-ptr";
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default:
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return "";
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}
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}
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static bool castRequiresQueuePtr(unsigned SrcAS) {
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return SrcAS == AMDGPUAS::LOCAL_ADDRESS || SrcAS == AMDGPUAS::PRIVATE_ADDRESS;
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}
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static bool isDSAddress(const Constant *C) {
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const GlobalValue *GV = dyn_cast<GlobalValue>(C);
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if (!GV)
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return false;
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unsigned AS = GV->getAddressSpace();
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return AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::REGION_ADDRESS;
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}
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class AMDGPUInformationCache : public InformationCache {
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public:
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AMDGPUInformationCache(const Module &M, AnalysisGetter &AG,
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BumpPtrAllocator &Allocator,
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SetVector<Function *> *CGSCC, TargetMachine &TM)
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: InformationCache(M, AG, Allocator, CGSCC), TM(TM) {}
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TargetMachine &TM;
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enum ConstantStatus { DS_GLOBAL = 1 << 0, ADDR_SPACE_CAST = 1 << 1 };
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/// Check if the subtarget has aperture regs.
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bool hasApertureRegs(Function &F) {
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const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F);
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return ST.hasApertureRegs();
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}
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private:
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/// Check if the ConstantExpr \p CE requires queue ptr attribute.
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static bool visitConstExpr(const ConstantExpr *CE) {
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if (CE->getOpcode() == Instruction::AddrSpaceCast) {
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unsigned SrcAS = CE->getOperand(0)->getType()->getPointerAddressSpace();
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return castRequiresQueuePtr(SrcAS);
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}
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return false;
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}
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/// Get the constant access bitmap for \p C.
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uint8_t getConstantAccess(const Constant *C) {
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auto It = ConstantStatus.find(C);
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if (It != ConstantStatus.end())
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return It->second;
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uint8_t Result = 0;
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if (isDSAddress(C))
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Result = DS_GLOBAL;
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if (const auto *CE = dyn_cast<ConstantExpr>(C))
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if (visitConstExpr(CE))
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Result |= ADDR_SPACE_CAST;
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for (const Use &U : C->operands()) {
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const auto *OpC = dyn_cast<Constant>(U);
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if (!OpC)
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continue;
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Result |= getConstantAccess(OpC);
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}
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return Result;
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}
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public:
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/// Returns true if \p Fn needs a queue ptr attribute because of \p C.
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bool needsQueuePtr(const Constant *C, Function &Fn) {
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bool IsNonEntryFunc = !AMDGPU::isEntryFunctionCC(Fn.getCallingConv());
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bool HasAperture = hasApertureRegs(Fn);
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// No need to explore the constants.
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if (!IsNonEntryFunc && HasAperture)
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return false;
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uint8_t Access = getConstantAccess(C);
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// We need to trap on DS globals in non-entry functions.
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if (IsNonEntryFunc && (Access & DS_GLOBAL))
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return true;
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return !HasAperture && (Access & ADDR_SPACE_CAST);
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}
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private:
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/// Used to determine if the Constant needs a queue ptr attribute.
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DenseMap<const Constant *, uint8_t> ConstantStatus;
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};
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struct AAAMDAttributes : public StateWrapper<BooleanState, AbstractAttribute> {
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using Base = StateWrapper<BooleanState, AbstractAttribute>;
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AAAMDAttributes(const IRPosition &IRP, Attributor &A) : Base(IRP) {}
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/// Create an abstract attribute view for the position \p IRP.
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static AAAMDAttributes &createForPosition(const IRPosition &IRP,
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Attributor &A);
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/// See AbstractAttribute::getName().
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const std::string getName() const override { return "AAAMDAttributes"; }
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/// See AbstractAttribute::getIdAddr().
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const char *getIdAddr() const override { return &ID; }
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/// This function should return true if the type of the \p AA is
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/// AAAMDAttributes.
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static bool classof(const AbstractAttribute *AA) {
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return (AA->getIdAddr() == &ID);
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}
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virtual const DenseSet<StringRef> &getAttributes() const = 0;
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/// Unique ID (due to the unique address)
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static const char ID;
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};
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const char AAAMDAttributes::ID = 0;
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struct AAAMDWorkGroupSize
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: public StateWrapper<BooleanState, AbstractAttribute> {
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using Base = StateWrapper<BooleanState, AbstractAttribute>;
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AAAMDWorkGroupSize(const IRPosition &IRP, Attributor &A) : Base(IRP) {}
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/// Create an abstract attribute view for the position \p IRP.
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static AAAMDWorkGroupSize &createForPosition(const IRPosition &IRP,
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Attributor &A);
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/// See AbstractAttribute::getName().
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const std::string getName() const override { return "AAAMDWorkGroupSize"; }
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/// See AbstractAttribute::getIdAddr().
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const char *getIdAddr() const override { return &ID; }
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/// This function should return true if the type of the \p AA is
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/// AAAMDAttributes.
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static bool classof(const AbstractAttribute *AA) {
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return (AA->getIdAddr() == &ID);
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}
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/// Unique ID (due to the unique address)
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static const char ID;
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};
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const char AAAMDWorkGroupSize::ID = 0;
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struct AAAMDWorkGroupSizeFunction : public AAAMDWorkGroupSize {
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AAAMDWorkGroupSizeFunction(const IRPosition &IRP, Attributor &A)
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: AAAMDWorkGroupSize(IRP, A) {}
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void initialize(Attributor &A) override {
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Function *F = getAssociatedFunction();
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CallingConv::ID CC = F->getCallingConv();
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if (CC != CallingConv::AMDGPU_KERNEL)
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return;
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bool InitialValue = false;
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if (F->hasFnAttribute("uniform-work-group-size"))
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InitialValue = F->getFnAttribute("uniform-work-group-size")
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.getValueAsString()
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.equals("true");
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if (InitialValue)
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indicateOptimisticFixpoint();
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else
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indicatePessimisticFixpoint();
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}
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ChangeStatus updateImpl(Attributor &A) override {
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ChangeStatus Change = ChangeStatus::UNCHANGED;
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auto CheckCallSite = [&](AbstractCallSite CS) {
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Function *Caller = CS.getInstruction()->getFunction();
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LLVM_DEBUG(dbgs() << "[AAAMDWorkGroupSize] Call " << Caller->getName()
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<< "->" << getAssociatedFunction()->getName() << "\n");
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const auto &CallerInfo = A.getAAFor<AAAMDWorkGroupSize>(
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*this, IRPosition::function(*Caller), DepClassTy::REQUIRED);
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Change = Change | clampStateAndIndicateChange(this->getState(),
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CallerInfo.getState());
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return true;
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};
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bool AllCallSitesKnown = true;
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if (!A.checkForAllCallSites(CheckCallSite, *this, true, AllCallSitesKnown))
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indicatePessimisticFixpoint();
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return Change;
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}
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ChangeStatus manifest(Attributor &A) override {
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SmallVector<Attribute, 8> AttrList;
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LLVMContext &Ctx = getAssociatedFunction()->getContext();
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AttrList.push_back(Attribute::get(Ctx, "uniform-work-group-size",
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getAssumed() ? "true" : "false"));
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return IRAttributeManifest::manifestAttrs(A, getIRPosition(), AttrList,
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/* ForceReplace */ true);
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}
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bool isValidState() const override {
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// This state is always valid, even when the state is false.
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return true;
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}
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const std::string getAsStr() const override {
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return "AMDWorkGroupSize[" + std::to_string(getAssumed()) + "]";
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}
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/// See AbstractAttribute::trackStatistics()
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void trackStatistics() const override {}
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};
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AAAMDWorkGroupSize &AAAMDWorkGroupSize::createForPosition(const IRPosition &IRP,
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Attributor &A) {
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if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
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return *new (A.Allocator) AAAMDWorkGroupSizeFunction(IRP, A);
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llvm_unreachable("AAAMDWorkGroupSize is only valid for function position");
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}
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struct AAAMDAttributesFunction : public AAAMDAttributes {
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AAAMDAttributesFunction(const IRPosition &IRP, Attributor &A)
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: AAAMDAttributes(IRP, A) {}
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void initialize(Attributor &A) override {
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Function *F = getAssociatedFunction();
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CallingConv::ID CC = F->getCallingConv();
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bool CallingConvSupportsAllImplicits = (CC != CallingConv::AMDGPU_Gfx);
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// Don't add attributes to instrinsics
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if (F->isIntrinsic()) {
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indicatePessimisticFixpoint();
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return;
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}
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// Ignore functions with graphics calling conventions, these are currently
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// not allowed to have kernel arguments.
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if (AMDGPU::isGraphics(F->getCallingConv())) {
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indicatePessimisticFixpoint();
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return;
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}
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for (StringRef Attr : ImplicitAttrNames) {
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if (F->hasFnAttribute(Attr))
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Attributes.insert(Attr);
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}
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// TODO: We shouldn't need this in the future.
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if (CallingConvSupportsAllImplicits &&
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F->hasAddressTaken(nullptr, true, true, true)) {
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for (StringRef AttrName : ImplicitAttrNames) {
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Attributes.insert(AttrName);
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}
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}
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}
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ChangeStatus updateImpl(Attributor &A) override {
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Function *F = getAssociatedFunction();
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ChangeStatus Change = ChangeStatus::UNCHANGED;
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bool IsNonEntryFunc = !AMDGPU::isEntryFunctionCC(F->getCallingConv());
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CallingConv::ID CC = F->getCallingConv();
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bool CallingConvSupportsAllImplicits = (CC != CallingConv::AMDGPU_Gfx);
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auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache());
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auto AddAttribute = [&](StringRef AttrName) {
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if (Attributes.insert(AttrName).second)
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Change = ChangeStatus::CHANGED;
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};
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// Check for Intrinsics and propagate attributes.
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const AACallEdges &AAEdges = A.getAAFor<AACallEdges>(
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*this, this->getIRPosition(), DepClassTy::REQUIRED);
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// We have to assume that we can reach a function with these attributes.
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// We do not consider inline assembly as a unknown callee.
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if (CallingConvSupportsAllImplicits && AAEdges.hasNonAsmUnknownCallee()) {
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for (StringRef AttrName : ImplicitAttrNames) {
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AddAttribute(AttrName);
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}
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}
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bool NeedsQueuePtr = false;
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bool HasCall = false;
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for (Function *Callee : AAEdges.getOptimisticEdges()) {
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Intrinsic::ID IID = Callee->getIntrinsicID();
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if (IID != Intrinsic::not_intrinsic) {
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if (!IsNonEntryFunc && IID == Intrinsic::amdgcn_kernarg_segment_ptr) {
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AddAttribute("amdgpu-kernarg-segment-ptr");
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continue;
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}
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bool NonKernelOnly = false;
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StringRef AttrName =
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intrinsicToAttrName(IID, NonKernelOnly, NeedsQueuePtr);
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if (!AttrName.empty() && (IsNonEntryFunc || !NonKernelOnly))
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AddAttribute(AttrName);
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continue;
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}
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HasCall = true;
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const AAAMDAttributes &AAAMD = A.getAAFor<AAAMDAttributes>(
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*this, IRPosition::function(*Callee), DepClassTy::REQUIRED);
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const DenseSet<StringRef> &CalleeAttributes = AAAMD.getAttributes();
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// Propagate implicit attributes from called function.
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for (StringRef AttrName : ImplicitAttrNames)
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if (CalleeAttributes.count(AttrName))
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AddAttribute(AttrName);
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}
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HasCall |= AAEdges.hasUnknownCallee();
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if (!IsNonEntryFunc && HasCall)
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AddAttribute("amdgpu-calls");
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// Check the function body.
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auto CheckAlloca = [&](Instruction &I) {
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AddAttribute("amdgpu-stack-objects");
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return false;
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};
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bool UsedAssumedInformation = false;
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A.checkForAllInstructions(CheckAlloca, *this, {Instruction::Alloca},
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UsedAssumedInformation);
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// If we found that we need amdgpu-queue-ptr, nothing else to do.
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if (NeedsQueuePtr || Attributes.count("amdgpu-queue-ptr")) {
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AddAttribute("amdgpu-queue-ptr");
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return Change;
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}
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auto CheckAddrSpaceCasts = [&](Instruction &I) {
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unsigned SrcAS = static_cast<AddrSpaceCastInst &>(I).getSrcAddressSpace();
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if (castRequiresQueuePtr(SrcAS)) {
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NeedsQueuePtr = true;
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return false;
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}
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return true;
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};
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bool HasApertureRegs = InfoCache.hasApertureRegs(*F);
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// `checkForAllInstructions` is much more cheaper than going through all
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// instructions, try it first.
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// amdgpu-queue-ptr is not needed if aperture regs is present.
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if (!HasApertureRegs)
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A.checkForAllInstructions(CheckAddrSpaceCasts, *this,
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{Instruction::AddrSpaceCast},
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UsedAssumedInformation);
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// If we found that we need amdgpu-queue-ptr, nothing else to do.
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if (NeedsQueuePtr) {
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AddAttribute("amdgpu-queue-ptr");
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return Change;
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}
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if (!IsNonEntryFunc && HasApertureRegs)
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return Change;
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for (BasicBlock &BB : *F) {
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for (Instruction &I : BB) {
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for (const Use &U : I.operands()) {
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if (const auto *C = dyn_cast<Constant>(U)) {
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if (InfoCache.needsQueuePtr(C, *F)) {
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AddAttribute("amdgpu-queue-ptr");
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return Change;
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}
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}
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}
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}
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}
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return Change;
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}
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ChangeStatus manifest(Attributor &A) override {
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SmallVector<Attribute, 8> AttrList;
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LLVMContext &Ctx = getAssociatedFunction()->getContext();
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for (StringRef AttrName : Attributes)
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AttrList.push_back(Attribute::get(Ctx, AttrName));
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return IRAttributeManifest::manifestAttrs(A, getIRPosition(), AttrList,
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/* ForceReplace */ true);
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}
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const std::string getAsStr() const override {
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return "AMDInfo[" + std::to_string(Attributes.size()) + "]";
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}
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const DenseSet<StringRef> &getAttributes() const override {
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return Attributes;
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}
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/// See AbstractAttribute::trackStatistics()
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void trackStatistics() const override {}
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private:
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DenseSet<StringRef> Attributes;
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};
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AAAMDAttributes &AAAMDAttributes::createForPosition(const IRPosition &IRP,
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Attributor &A) {
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if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
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return *new (A.Allocator) AAAMDAttributesFunction(IRP, A);
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llvm_unreachable("AAAMDAttributes is only valid for function position");
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}
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class AMDGPUAttributor : public ModulePass {
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public:
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AMDGPUAttributor() : ModulePass(ID) {}
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/// doInitialization - Virtual method overridden by subclasses to do
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/// any necessary initialization before any pass is run.
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bool doInitialization(Module &) override {
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auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();
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if (!TPC)
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report_fatal_error("TargetMachine is required");
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TM = &TPC->getTM<TargetMachine>();
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return false;
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}
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bool runOnModule(Module &M) override {
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SetVector<Function *> Functions;
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AnalysisGetter AG;
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for (Function &F : M)
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Functions.insert(&F);
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CallGraphUpdater CGUpdater;
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BumpPtrAllocator Allocator;
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AMDGPUInformationCache InfoCache(M, AG, Allocator, nullptr, *TM);
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Attributor A(Functions, InfoCache, CGUpdater);
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for (Function &F : M) {
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A.getOrCreateAAFor<AAAMDAttributes>(IRPosition::function(F));
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A.getOrCreateAAFor<AAAMDWorkGroupSize>(IRPosition::function(F));
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}
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ChangeStatus Change = A.run();
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return Change == ChangeStatus::CHANGED;
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}
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StringRef getPassName() const override { return "AMDGPU Attributor"; }
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TargetMachine *TM;
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static char ID;
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};
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char AMDGPUAttributor::ID = 0;
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Pass *llvm::createAMDGPUAttributorPass() { return new AMDGPUAttributor(); }
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INITIALIZE_PASS(AMDGPUAttributor, DEBUG_TYPE, "AMDGPU Attributor", false, false)
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