George Rimar d5d6468ed7 Recommit r270070 ([llvm-mc] - Teach llvm-mc to generate compressed debug sections in zlib style.) ...

Now, after landing r270560, r270557, r270320 it is a proper time.

Original commit message:
[llvm-mc] - Teach llvm-mc to generate compressed debug sections in zlib style.

Before this patch llvm-mc generated zlib-gnu styled sections. 
That means no SHF_COMPRESSED flag was set, magic 'zlib' signature
was used in combination with full size field. Sections were renamed to "*.z*".
This patch reimplements the compression style to zlib one as zlib-gnu looks
to be depricated everywhere.

Differential revision: http://reviews.llvm.org/D20331

llvm-svn: 270569

2016-05-24 15:19:35 +00:00

..

AArch64

add support for -print-imm-hex for AArch64

2016-05-13 18:00:09 +00:00

AMDGPU

[AMDGPU] Assembler: rework parsing of optional operands.

2016-05-24 12:38:33 +00:00

ARM

Don't pass relocation-model= to tests that don't need it.

2016-05-18 00:27:17 +00:00

AsmParser

[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.

2016-04-19 23:51:52 +00:00

COFF

[MC] Create unique .pdata sections for every .text section

2016-05-02 23:22:18 +00:00

Disassembler

[AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers.

2016-05-24 12:05:16 +00:00

ELF

Recommit r270070 ([llvm-mc] - Teach llvm-mc to generate compressed debug sections in zlib style.)

2016-05-24 15:19:35 +00:00

Hexagon

[Hexagon] Use pipe instead of temporary files in tests

2016-05-20 14:01:34 +00:00

Lanai

[lanai] isBrImm should accept any non-constant immediate.

2016-03-31 17:58:55 +00:00

MachO

CodeGen: Use PLT relocations for relative references to unnamed_addr functions.

2016-04-22 20:40:10 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocation

2016-05-19 12:20:40 +00:00

PowerPC

Don't pass relocation-model= to tests that don't need it.

2016-05-18 00:27:17 +00:00

Sparc

Don't pass a Reloc::Model to MC.

2016-05-18 11:58:50 +00:00

SystemZ

[SystemZ] Support LRVH and STRVH opcodes

2016-05-16 20:32:22 +00:00

X86

[MCExpr] avoid UB via negation of INT_MIN

2016-05-20 14:09:41 +00:00