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llvm-mirror/test/CodeGen
2021-05-14 16:30:51 -07:00
..
AArch64 [GlobalISel][CallLowering] Fix crash when handling a v3s32 type that's being passed as v2s64. 2021-05-14 16:30:51 -07:00
AMDGPU [AMDGPU] Update SCC defs to VCC when uses are changed to VCC 2021-05-14 18:05:05 -04:00
ARC
ARM
AVR
BPF
Generic [AIX] XFAIL CodeGen/Generic/externally_available.ll 2021-05-13 13:24:48 +00:00
Hexagon
Inputs
Lanai
M68k
Mips Revert "[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics" 2021-05-12 09:46:18 -05:00
MIR
MSP430
NVPTX
PowerPC [PowerPC] Add ROP Protection to prologue and epilogue 2021-05-13 12:54:44 -05:00
RISCV [RISCV] Add the DebugLoc parameter to getVLENFactoredAmount(). 2021-05-14 21:31:06 +08:00
SPARC
SystemZ
Thumb
Thumb2 [ARM] Expand predecessor search to multiple blocks when reverting WhileLoopStarts 2021-05-14 15:08:14 +01:00
VE
WebAssembly [WebAssembly] Omit DBG_VALUE after terminator 2021-05-14 03:48:19 -07:00
WinCFGuard
WinEH
X86 Don't run MachineVerifier on sjlj-unwind-inline-asm test because of known issue (PR39439) 2021-05-13 23:14:05 +01:00
XCore