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llvm-mirror/test/CodeGen/M68k
Min-Yih Hsu f050da095d [M68k][AsmParser] Fix invalid register name parsing logics
Adjust sanity check in register parsing function to allow register
name with more than 2 characters (e.g. ccr).

Differential Revision: https://reviews.llvm.org/D101733
2021-05-05 17:13:02 -07:00
..
Alloc
Arith [DAG] computeKnownBits - add ISD::MULHS/MULHU/SMUL_LOHI/UMUL_LOHI handling 2021-03-19 16:02:31 +00:00
CConv
CodeModel
Control
Encoding [M68k][AsmParser] Fix invalid register name parsing logics 2021-05-05 17:13:02 -07:00
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lit.local.cfg
varargs.ll