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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
35 lines
872 B
YAML
35 lines
872 B
YAML
# RUN: llc -march=hexagon -run-pass hexagon-cext-opt %s -o - | FileCheck %s
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# Check that "misaligned" extended offsets are handled correctly, that is
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# that the non-extended offsets are still aligned.
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# CHECK: %[[B:[0-9]+]]:intregs = A2_addi %{{[0-9]+}}, @array + 174
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# CHECK-DAG: S2_storerd_io %[[B]], 0,
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# CHECK-DAG: S2_storerd_io %[[B]], 8,
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# CHECK-DAG: S2_storerd_io %[[B]], 24,
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# CHECK-DAG: S2_storerd_io %[[B]], 16,
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--- |
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define void @fred() {
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ret void
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}
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@array = external global [10000 x i16], align 8
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...
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---
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name: fred
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0
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%0:intregs = COPY $r0
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%1:intregs = S4_ori_asl_ri 2, %0, 1
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%2:doubleregs = A2_tfrpi 0
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S2_storerd_io %1, @array + 174, %2
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S2_storerd_io %1, @array + 182, %2
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S2_storerd_io %1, @array + 198, %2
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S2_storerd_io %1, @array + 190, %2
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...
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