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llvm-mirror/test/MC/Disassembler/AMDGPU/vintrp.txt
Matt Arsenault c74ace61e1 AMDGPU: Change vintrp printing
llvm-svn: 289664
2016-12-14 16:36:12 +00:00

50 lines
1.0 KiB
Plaintext

# RUN: llvm-mc -arch=amdgcn -mcpu=fiji -disassemble < %s | FileCheck %s -check-prefix=VI
#VI: v_interp_p1_f32 v7, v212, attr16.y
0xd4 0x41 0x1c 0xd4
#VI: v_interp_p2_f32 v7, v212, attr16.y
0xd4 0x41 0x1d 0xd4
#VI: v_interp_mov_f32 v7, invalid_param_212, attr16.y
0xd4 0x41 0x1e 0xd4
#VI: v_interp_mov_f32 v7, p10, attr16.y
0x00 0x41 0x1e 0xd4
#VI: v_interp_mov_f32 v7, p20, attr16.y
0x01 0x41 0x1e 0xd4
#VI: v_interp_mov_f32 v7, p0, attr16.y
0x02 0x41 0x1e 0xd4
#VI: v_interp_mov_f32 v7, invalid_param_3, attr16.y
0x03 0x41 0x1e 0xd4
# VI: v_interp_p1_f32 v0, v0, attr0.x
0x00 0x00 0x00 0xd4
# VI: v_interp_p1_f32 v0, v0, attr0.x
0x00 0x00 0x00 0xd4
# VI: v_interp_p1_f32 v0, v1, attr0.x
0x01 0x00 0x00 0xd4
# VI: v_interp_p1_f32 v0, v1, attr0.w
0x01 0x03 0x00 0xd4
# VI: v_interp_p2_f32 v0, v1, attr0.x
0x01 0x00 0x01 0xd4
# VI: v_interp_mov_f32 v0, p20, attr0.x
0x01 0x00 0x02 0xd4
#VI: v_interp_p2_f32 v0, v1, attr63.x
0x01 0xfc 0x01 0xd4
#VI: v_interp_p2_f32 v0, v1, attr63.x
0x01 0xfc 0x01 0xd4
#VI: v_interp_p2_f32 v0, v1, attr63.w
0x01 0xff 0x01 0xd4