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5d7e52f1e1
This is a update to D43157 to correctly handle fixup_riscv_pcrel_lo12. Notable changes: Rebased onto trunk Handle and test S-type Test case pcrel-hilo.s is merged into relocations.s D43157 description: VK_RISCV_PCREL_LO has to be handled specially. The MCExpr inside is actually the location of an auipc instruction with a VK_RISCV_PCREL_HI fixup pointing to the real target. Differential Revision: https://reviews.llvm.org/D54029 Patch by Chih-Mao Chen and Michael Spencer. llvm-svn: 349764
84 lines
2.7 KiB
ArmAsm
84 lines
2.7 KiB
ArmAsm
# RUN: llvm-mc -triple riscv32 -riscv-no-aliases < %s -show-encoding \
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# RUN: | FileCheck -check-prefix=CHECK-FIXUP %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -riscv-no-aliases -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INSTR %s
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# RUN: llvm-mc -filetype=obj -triple=riscv32 %s \
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# RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
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# Checks that fixups that can be resolved within the same object file are
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# applied correctly
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.LBB0:
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lui t1, %hi(val)
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# CHECK-FIXUP: fixup A - offset: 0, value: %hi(val), kind: fixup_riscv_hi20
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# CHECK-INSTR: lui t1, 74565
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lw a0, %lo(val)(t1)
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# CHECK-FIXUP: fixup A - offset: 0, value: %lo(val), kind: fixup_riscv_lo12_i
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# CHECK-INSTR: lw a0, 1656(t1)
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addi a1, t1, %lo(val)
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# CHECK-FIXUP: fixup A - offset: 0, value: %lo(val), kind: fixup_riscv_lo12_i
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# CHECK-INSTR: addi a1, t1, 1656
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sw a0, %lo(val)(t1)
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# CHECK-FIXUP: fixup A - offset: 0, value: %lo(val), kind: fixup_riscv_lo12_s
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# CHECK-INSTR: sw a0, 1656(t1)
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1:
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auipc t1, %pcrel_hi(.LBB0)
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# CHECK-FIXUP: fixup A - offset: 0, value: %pcrel_hi(.LBB0), kind: fixup_riscv_pcrel_hi20
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# CHECK-INSTR: auipc t1, 0
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addi t1, t1, %pcrel_lo(1b)
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# CHECK-FIXUP: fixup A - offset: 0, value: %pcrel_lo(.Ltmp0), kind: fixup_riscv_pcrel_lo12_i
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# CHECK-INSTR: addi t1, t1, -16
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sw t1, %pcrel_lo(1b)(t1)
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# CHECK-FIXUP: fixup A - offset: 0, value: %pcrel_lo(.Ltmp0), kind: fixup_riscv_pcrel_lo12_s
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# CHECK-INSTR: sw t1, -16(t1)
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jal zero, .LBB0
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# CHECK-FIXUP: fixup A - offset: 0, value: .LBB0, kind: fixup_riscv_jal
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# CHECK-INSTR: jal zero, -28
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jal zero, .LBB2
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# CHECK-FIXUP: fixup A - offset: 0, value: .LBB2, kind: fixup_riscv_jal
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# CHECK-INSTR: jal zero, 330996
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beq a0, a1, .LBB0
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# CHECK-FIXUP: fixup A - offset: 0, value: .LBB0, kind: fixup_riscv_branch
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# CHECK-INSTR: beq a0, a1, -36
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blt a0, a1, .LBB1
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# CHECK-FIXUP: fixup A - offset: 0, value: .LBB1, kind: fixup_riscv_branch
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# CHECK-INSTR: blt a0, a1, 1108
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.fill 1104
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.LBB1:
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.fill 329876
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addi zero, zero, 0
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.LBB2:
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.set val, 0x12345678
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# CHECK-REL-NOT: R_RISCV
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# Testing the function call offset could resovled by assembler
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# when the function and the callsite within the same compile unit
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# and the linker relaxation is disabled.
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func:
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.fill 100
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call func
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# CHECK-FIXUP: fixup A - offset: 0, value: func, kind: fixup_riscv_call
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# CHECK-INSTR: auipc ra, 0
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# CHECK-INSTR: jalr ra, ra, -100
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.fill 10000
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call func
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# CHECK-FIXUP: fixup A - offset: 0, value: func, kind: fixup_riscv_call
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# CHECK-INSTR: auipc ra, 1048574
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# CHECK-INSTR: jalr ra, ra, -1916
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.fill 20888
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call func
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# CHECK-FIXUP: fixup A - offset: 0, value: func, kind: fixup_riscv_call
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# CHECK-INSTR: auipc ra, 1048568
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# CHECK-INSTR: jalr ra, ra, 1764
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