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7e501cf4c3
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
llvm-svn: 186280
119 lines
3.2 KiB
LLVM
119 lines
3.2 KiB
LLVM
; Test 64-bit unsigned comparison in which the second operand is a variable.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check CLGR.
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define double @f1(double %a, double %b, i64 %i1, i64 %i2) {
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; CHECK-LABEL: f1:
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; CHECK: clgr %r2, %r3
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check CLG with no displacement.
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define double @f2(double %a, double %b, i64 %i1, i64 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: clg %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%i2 = load i64 *%ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the aligned CLG range.
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define double @f3(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK-LABEL: f3:
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; CHECK: clg %r2, 524280(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65535
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%i2 = load i64 *%ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f4(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK-LABEL: f4:
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; CHECK: agfi %r3, 524288
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; CHECK: clg %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65536
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%i2 = load i64 *%ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the negative aligned CLG range.
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define double @f5(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK-LABEL: f5:
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; CHECK: clg %r2, -8(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -1
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%i2 = load i64 *%ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the low end of the CLG range.
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define double @f6(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK-LABEL: f6:
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; CHECK: clg %r2, -524288(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65536
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%i2 = load i64 *%ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f7(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK-LABEL: f7:
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; CHECK: agfi %r3, -524296
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; CHECK: clg %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65537
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%i2 = load i64 *%ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that CLG allows an index.
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define double @f8(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
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; CHECK-LABEL: f8:
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; CHECK: clg %r2, 524280({{%r4,%r3|%r3,%r4}})
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 524280
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%ptr = inttoptr i64 %add2 to i64 *
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%i2 = load i64 *%ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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