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bb7326c8ea
`IMAGE_REL_ARM64_REL64/IMAGE_REL_AMD64_REL64` do not exist and `.quad a - .` is currently not representable. For instrumentation, `.quad a - .` is useful representing a cross-section reference in a metadata section, to allow ELF medium/large code models. The COFF limitation makes such generic instrumentations inconvenient. I plan to make a PGO/coverage metadata section field relative in D104556. Differential Revision: https://reviews.llvm.org/D104564
164 lines
5.7 KiB
C++
164 lines
5.7 KiB
C++
//= AArch64WinCOFFObjectWriter.cpp - AArch64 Windows COFF Object Writer C++ =//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===---------------------------------------------------------------------===//
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#include "AArch64MCTargetDesc.h"
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#include "MCTargetDesc/AArch64FixupKinds.h"
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#include "MCTargetDesc/AArch64MCExpr.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/BinaryFormat/COFF.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/MC/MCWinCOFFObjectWriter.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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using namespace llvm;
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namespace {
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class AArch64WinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
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public:
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AArch64WinCOFFObjectWriter()
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: MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARM64) {}
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~AArch64WinCOFFObjectWriter() override = default;
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unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup, bool IsCrossSection,
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const MCAsmBackend &MAB) const override;
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bool recordRelocation(const MCFixup &) const override;
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};
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} // end anonymous namespace
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unsigned AArch64WinCOFFObjectWriter::getRelocType(
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MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup,
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bool IsCrossSection, const MCAsmBackend &MAB) const {
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unsigned FixupKind = Fixup.getKind();
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if (IsCrossSection) {
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// IMAGE_REL_ARM64_REL64 does not exist. We treat FK_Data_8 as FK_PCRel_4 so
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// that .xword a-b can lower to IMAGE_REL_ARM64_REL32. This allows generic
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// instrumentation to not bother with the COFF limitation. A negative value
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// needs attention.
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if (FixupKind != FK_Data_4 && FixupKind != FK_Data_8) {
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Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
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return COFF::IMAGE_REL_ARM64_ADDR32;
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}
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FixupKind = FK_PCRel_4;
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}
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auto Modifier = Target.isAbsolute() ? MCSymbolRefExpr::VK_None
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: Target.getSymA()->getKind();
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const MCExpr *Expr = Fixup.getValue();
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if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
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AArch64MCExpr::VariantKind RefKind = A64E->getKind();
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switch (AArch64MCExpr::getSymbolLoc(RefKind)) {
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case AArch64MCExpr::VK_ABS:
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case AArch64MCExpr::VK_SECREL:
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// Supported
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break;
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default:
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Ctx.reportError(Fixup.getLoc(), "relocation variant " +
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A64E->getVariantKindName() +
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" unsupported on COFF targets");
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return COFF::IMAGE_REL_ARM64_ABSOLUTE; // Dummy return value
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}
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}
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switch (FixupKind) {
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default: {
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if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
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Ctx.reportError(Fixup.getLoc(), "relocation type " +
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A64E->getVariantKindName() +
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" unsupported on COFF targets");
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} else {
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const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
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Ctx.reportError(Fixup.getLoc(), Twine("relocation type ") + Info.Name +
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" unsupported on COFF targets");
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}
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return COFF::IMAGE_REL_ARM64_ABSOLUTE; // Dummy return value
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}
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case FK_PCRel_4:
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return COFF::IMAGE_REL_ARM64_REL32;
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case FK_Data_4:
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switch (Modifier) {
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default:
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return COFF::IMAGE_REL_ARM64_ADDR32;
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case MCSymbolRefExpr::VK_COFF_IMGREL32:
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return COFF::IMAGE_REL_ARM64_ADDR32NB;
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case MCSymbolRefExpr::VK_SECREL:
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return COFF::IMAGE_REL_ARM64_SECREL;
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}
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case FK_Data_8:
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return COFF::IMAGE_REL_ARM64_ADDR64;
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case FK_SecRel_2:
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return COFF::IMAGE_REL_ARM64_SECTION;
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case FK_SecRel_4:
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return COFF::IMAGE_REL_ARM64_SECREL;
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case AArch64::fixup_aarch64_add_imm12:
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if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
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AArch64MCExpr::VariantKind RefKind = A64E->getKind();
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if (RefKind == AArch64MCExpr::VK_SECREL_LO12)
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return COFF::IMAGE_REL_ARM64_SECREL_LOW12A;
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if (RefKind == AArch64MCExpr::VK_SECREL_HI12)
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return COFF::IMAGE_REL_ARM64_SECREL_HIGH12A;
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}
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return COFF::IMAGE_REL_ARM64_PAGEOFFSET_12A;
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case AArch64::fixup_aarch64_ldst_imm12_scale1:
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case AArch64::fixup_aarch64_ldst_imm12_scale2:
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case AArch64::fixup_aarch64_ldst_imm12_scale4:
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case AArch64::fixup_aarch64_ldst_imm12_scale8:
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case AArch64::fixup_aarch64_ldst_imm12_scale16:
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if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
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AArch64MCExpr::VariantKind RefKind = A64E->getKind();
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if (RefKind == AArch64MCExpr::VK_SECREL_LO12)
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return COFF::IMAGE_REL_ARM64_SECREL_LOW12L;
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}
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return COFF::IMAGE_REL_ARM64_PAGEOFFSET_12L;
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case AArch64::fixup_aarch64_pcrel_adr_imm21:
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return COFF::IMAGE_REL_ARM64_REL21;
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case AArch64::fixup_aarch64_pcrel_adrp_imm21:
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return COFF::IMAGE_REL_ARM64_PAGEBASE_REL21;
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case AArch64::fixup_aarch64_pcrel_branch14:
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return COFF::IMAGE_REL_ARM64_BRANCH14;
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case AArch64::fixup_aarch64_pcrel_branch19:
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return COFF::IMAGE_REL_ARM64_BRANCH19;
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case AArch64::fixup_aarch64_pcrel_branch26:
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case AArch64::fixup_aarch64_pcrel_call26:
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return COFF::IMAGE_REL_ARM64_BRANCH26;
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}
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}
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bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
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return true;
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}
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std::unique_ptr<MCObjectTargetWriter> llvm::createAArch64WinCOFFObjectWriter() {
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return std::make_unique<AArch64WinCOFFObjectWriter>();
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}
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