Tim Northover dff10eef24 AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands ... These can have different relocations in ELF. In particular both: b.eq global ldr x0, global are valid, giving different relocations. The only possible way to distinguish them is via a different fixup, so the operands had to be separated throughout the backend. llvm-svn: 207105		2014-04-24 12:12:10 +00:00
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AArch64	AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands	2014-04-24 12:12:10 +00:00
ARM	Fix for PR18921, "vmov" part.	2014-04-24 06:03:01 +00:00
ARM64	AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands	2014-04-24 12:12:10 +00:00
AsmParser	Integrated assbemler, macros: added 'vararg' argument qualifier support.	2014-04-23 06:56:28 +00:00
COFF	MC: disable test on thumbv7-windows	2014-04-23 21:55:18 +00:00
Disassembler	X86Disassembler - fixed a bug in immediate print	2014-04-23 07:21:04 +00:00
ELF	Handle _GLOBAL_OFFSET_TABLE_ in 64 bit mode.	2014-04-21 21:15:45 +00:00
MachO	Fix the assembler to print a better relocatable expression error	2014-04-22 17:27:29 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	[mips] Use TwoOperandAliasConstraint for shift instructions.	2014-04-16 16:28:59 +00:00
PowerPC	[MC] Emit an error if cfi_startproc is used before a symbol is defined.	2014-04-15 01:17:45 +00:00
Sparc	[Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc backend.	2014-03-02 23:39:07 +00:00
SystemZ	[SystemZ] Add support for z196 float<->unsigned conversions	2014-03-21 10:56:30 +00:00
X86	[AVX512] Implemented integer conversions up/down with masking.	2014-04-22 11:36:19 +00:00