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bdc6e663e7
This patch adds support for struct return values to the MSP430 target backend. It also reverses the order of argument and return registers in the calling convention to bring it into closer alignment with the published EABI from TI. Patch by Andrew Wygle (awygle). Differential Revision: https://reviews.llvm.org/D29069 llvm-svn: 296807
82 lines
1.8 KiB
LLVM
82 lines
1.8 KiB
LLVM
; RUN: llc < %s -march=msp430 | FileCheck %s
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target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:16"
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target triple = "msp430-generic-generic"
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define void @am1(i16* %a, i16 %x) nounwind {
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%1 = load i16, i16* %a
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%2 = or i16 %x, %1
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store i16 %2, i16* %a
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ret void
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}
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; CHECK-LABEL: am1:
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; CHECK: bis.w r13, 0(r12)
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@foo = external global i16
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define void @am2(i16 %x) nounwind {
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%1 = load i16, i16* @foo
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%2 = or i16 %x, %1
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store i16 %2, i16* @foo
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ret void
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}
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; CHECK-LABEL: am2:
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; CHECK: bis.w r12, &foo
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@bar = external global [2 x i8]
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define void @am3(i16 %i, i8 %x) nounwind {
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%1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %i
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%2 = load i8, i8* %1
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%3 = or i8 %x, %2
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store i8 %3, i8* %1
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ret void
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}
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; CHECK-LABEL: am3:
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; CHECK: bis.b r13, bar(r12)
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define void @am4(i16 %x) nounwind {
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%1 = load volatile i16, i16* inttoptr(i16 32 to i16*)
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%2 = or i16 %x, %1
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store volatile i16 %2, i16* inttoptr(i16 32 to i16*)
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ret void
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}
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; CHECK-LABEL: am4:
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; CHECK: bis.w r12, &32
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define void @am5(i16* %a, i16 %x) readonly {
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%1 = getelementptr inbounds i16, i16* %a, i16 2
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%2 = load i16, i16* %1
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%3 = or i16 %x, %2
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store i16 %3, i16* %1
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ret void
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}
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; CHECK-LABEL: am5:
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; CHECK: bis.w r13, 4(r12)
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%S = type { i16, i16 }
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@baz = common global %S zeroinitializer
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define void @am6(i16 %x) nounwind {
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%1 = load i16, i16* getelementptr (%S, %S* @baz, i32 0, i32 1)
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%2 = or i16 %x, %1
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store i16 %2, i16* getelementptr (%S, %S* @baz, i32 0, i32 1)
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ret void
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}
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; CHECK-LABEL: am6:
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; CHECK: bis.w r12, &baz+2
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%T = type { i16, [2 x i8] }
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@duh = external global %T
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define void @am7(i16 %n, i8 %x) nounwind {
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%1 = getelementptr %T, %T* @duh, i32 0, i32 1
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%2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
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%3 = load i8, i8* %2
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%4 = or i8 %x, %3
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store i8 %4, i8* %2
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ret void
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}
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; CHECK-LABEL: am7:
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; CHECK: bis.b r13, duh+2(r12)
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