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bdc6e663e7
This patch adds support for struct return values to the MSP430 target backend. It also reverses the order of argument and return registers in the calling convention to bring it into closer alignment with the published EABI from TI. Patch by Andrew Wygle (awygle). Differential Revision: https://reviews.llvm.org/D29069 llvm-svn: 296807
59 lines
1.2 KiB
LLVM
59 lines
1.2 KiB
LLVM
; RUN: llc -march=msp430 < %s | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
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target triple = "msp430-generic-generic"
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@foo = common global i16 0, align 2
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define void @mov(i16 %a) nounwind {
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; CHECK-LABEL: mov:
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; CHECK: mov.w r12, &foo
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store i16 %a, i16* @foo
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ret void
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}
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define void @add(i16 %a) nounwind {
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; CHECK-LABEL: add:
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; CHECK: add.w r12, &foo
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%1 = load i16, i16* @foo
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%2 = add i16 %a, %1
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store i16 %2, i16* @foo
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ret void
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}
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define void @and(i16 %a) nounwind {
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; CHECK-LABEL: and:
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; CHECK: and.w r12, &foo
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%1 = load i16, i16* @foo
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%2 = and i16 %a, %1
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store i16 %2, i16* @foo
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ret void
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}
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define void @bis(i16 %a) nounwind {
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; CHECK-LABEL: bis:
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; CHECK: bis.w r12, &foo
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%1 = load i16, i16* @foo
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%2 = or i16 %a, %1
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store i16 %2, i16* @foo
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ret void
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}
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define void @bic(i16 zeroext %m) nounwind {
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; CHECK-LABEL: bic:
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; CHECK: bic.w r12, &foo
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%1 = xor i16 %m, -1
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%2 = load i16, i16* @foo
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%3 = and i16 %2, %1
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store i16 %3, i16* @foo
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ret void
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}
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define void @xor(i16 %a) nounwind {
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; CHECK-LABEL: xor:
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; CHECK: xor.w r12, &foo
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%1 = load i16, i16* @foo
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%2 = xor i16 %a, %1
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store i16 %2, i16* @foo
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ret void
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}
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