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bdc6e663e7
This patch adds support for struct return values to the MSP430 target backend. It also reverses the order of argument and return registers in the calling convention to bring it into closer alignment with the published EABI from TI. Patch by Andrew Wygle (awygle). Differential Revision: https://reviews.llvm.org/D29069 llvm-svn: 296807
62 lines
1.4 KiB
LLVM
62 lines
1.4 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
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target triple = "msp430---elf"
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define void @test() #0 {
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entry:
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; CHECK: test:
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; CHECK: call #f_i16
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; CHECK: mov.w r12, &g_i16
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%0 = call i16 @f_i16()
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store volatile i16 %0, i16* @g_i16
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; CHECK: call #f_i32
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; CHECK: mov.w r13, &g_i32+2
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; CHECK: mov.w r12, &g_i32
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%1 = call i32 @f_i32()
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store volatile i32 %1, i32* @g_i32
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; CHECK: call #f_i64
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; CHECK: mov.w r15, &g_i64+6
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; CHECK: mov.w r14, &g_i64+4
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; CHECK: mov.w r13, &g_i64+2
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; CHECK: mov.w r12, &g_i64
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%2 = call i64 @f_i64()
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store volatile i64 %2, i64* @g_i64
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ret void
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}
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@g_i16 = common global i16 0, align 2
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@g_i32 = common global i32 0, align 2
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@g_i64 = common global i64 0, align 2
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define i16 @f_i16() #0 {
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; CHECK: f_i16:
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; CHECK: mov.w #1, r12
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; CHECK: ret
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ret i16 1
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}
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define i32 @f_i32() #0 {
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; CHECK: f_i32:
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; CHECK: mov.w #772, r12
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; CHECK: mov.w #258, r13
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; CHECK: ret
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ret i32 16909060
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}
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define i64 @f_i64() #0 {
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; CHECK: f_i64:
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; CHECK: mov.w #1800, r12
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; CHECK: mov.w #1286, r13
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; CHECK: mov.w #772, r14
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; CHECK: mov.w #258, r15
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; CHECK: ret
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ret i64 72623859790382856
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}
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attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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