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If Select pseudo instruction doesn't have use SR, then CMP instructions are being marked as dead and later can be removed by MachineCSE pass. This leads to incorrect code generation. Differential Revision: https://reviews.llvm.org/D32473 llvm-svn: 301372
22 lines
462 B
LLVM
22 lines
462 B
LLVM
; RUN: llc < %s -march=msp430 | FileCheck %s
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; PR32769
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target triple = "msp430"
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; Test that CMP instruction is not removed by MachineCSE.
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;
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; CHECK-LABEL: @f
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; CHECK: cmp.w r15, r13
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; CHECK: cmp.w r15, r13
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; CHECK-NEXT: jeq .LBB0_2
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define i16 @f(i16, i16, i16, i16) {
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entry:
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%4 = icmp ult i16 %1, %3
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%5 = zext i1 %4 to i16
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%6 = icmp ult i16 %0, %2
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%7 = zext i1 %6 to i16
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%8 = icmp eq i16 %1, %3
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%out = select i1 %8, i16 %5, i16 %7
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ret i16 %out
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}
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