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llvm-mirror/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
Matt Arsenault 21aca8a3e2 GlobalISel: Reduce G_SHL width if source is extension 
shl ([sza]ext x, y) => zext (shl x, y).

Turns expensive 64 bit shifts into 32 bit if it does not overflow the
source type:

This is a port of an AMDGPU DAG combine added in
5fa289f0d8ff85b9e14d2f814a90761378ab54ae. InstCombine does this
already, but we need to do it again here to apply it to shifts
introduced for lowered getelementptrs. This will help matching
addressing modes that use 32-bit offsets in a future patch.

TableGen annoyingly assumes only a single match data operand, so
introduce a reusable struct. However, this still requires defining a
separate GIMatchData for every combine which is still annoying.

Adds a morally equivalent function to the existing
getShiftAmountTy. Without this, we would have to do try to repeatedly
query the legalizer info and guess at what type to use for the shift.
2020-08-24 09:42:40 -04:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
# Can't narrow this; need known bits
---
name: shl_s64_by_2_from_anyext_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: shl_s64_by_2_from_anyext_s32
; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX6: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32)
; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX6: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ANYEXT]], [[C]](s32)
; GFX6: $vgpr0_vgpr1 = COPY [[SHL]](s64)
; GFX9-LABEL: name: shl_s64_by_2_from_anyext_s32
; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32)
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ANYEXT]], [[C]](s32)
; GFX9: $vgpr0_vgpr1 = COPY [[SHL]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s64) = G_ANYEXT %0
%2:_(s32) = G_CONSTANT i32 2
%3:_(s64) = G_SHL %1, %2
$vgpr0_vgpr1 = COPY %3
...
# Can't narrow this; need known bits
---
name: shl_s64_by_2_from_sext_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: shl_s64_by_2_from_sext_s32
; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX6: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s32)
; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX6: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[SEXT]], [[C]](s32)
; GFX6: $vgpr0_vgpr1 = COPY [[SHL]](s64)
; GFX9-LABEL: name: shl_s64_by_2_from_sext_s32
; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s32)
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[SEXT]], [[C]](s32)
; GFX9: $vgpr0_vgpr1 = COPY [[SHL]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s64) = G_SEXT %0
%2:_(s32) = G_CONSTANT i32 2
%3:_(s64) = G_SHL %1, %2
$vgpr0_vgpr1 = COPY %3
...
# Can't narrow this; need known bits
---
name: shl_s64_by_2_from_zext_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: shl_s64_by_2_from_zext_s32
; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX6: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX6: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[C]](s32)
; GFX6: $vgpr0_vgpr1 = COPY [[SHL]](s64)
; GFX9-LABEL: name: shl_s64_by_2_from_zext_s32
; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[C]](s32)
; GFX9: $vgpr0_vgpr1 = COPY [[SHL]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s64) = G_ZEXT %0
%2:_(s32) = G_CONSTANT i32 2
%3:_(s64) = G_SHL %1, %2
$vgpr0_vgpr1 = COPY %3
...
---
name: narrow_shl_s64_by_2_from_anyext_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: narrow_shl_s64_by_2_from_anyext_s32
; GFX6: liveins: $vgpr0
; GFX6: %narrow:_(s32) = COPY $vgpr0
; GFX6: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX6: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX6: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX6: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX6: $vgpr0_vgpr1 = COPY %shl(s64)
; GFX9-LABEL: name: narrow_shl_s64_by_2_from_anyext_s32
; GFX9: liveins: $vgpr0
; GFX9: %narrow:_(s32) = COPY $vgpr0
; GFX9: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX9: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX9: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX9: $vgpr0_vgpr1 = COPY %shl(s64)
%narrow:_(s32) = COPY $vgpr0
%masklow30:_(s32) = G_CONSTANT i32 1073741823
%masked:_(s32) = G_AND %narrow, %masklow30
%extend:_(s64) = G_ANYEXT %masked
%shiftamt:_(s32) = G_CONSTANT i32 2
%shl:_(s64) = G_SHL %extend, %shiftamt
$vgpr0_vgpr1 = COPY %shl
...
---
name: narrow_shl_s64_by_2_from_zext_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: narrow_shl_s64_by_2_from_zext_s32
; GFX6: liveins: $vgpr0
; GFX6: %narrow:_(s32) = COPY $vgpr0
; GFX6: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX6: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX6: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX6: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX6: $vgpr0_vgpr1 = COPY %shl(s64)
; GFX9-LABEL: name: narrow_shl_s64_by_2_from_zext_s32
; GFX9: liveins: $vgpr0
; GFX9: %narrow:_(s32) = COPY $vgpr0
; GFX9: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX9: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX9: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX9: $vgpr0_vgpr1 = COPY %shl(s64)
%narrow:_(s32) = COPY $vgpr0
%masklow30:_(s32) = G_CONSTANT i32 1073741823
%masked:_(s32) = G_AND %narrow, %masklow30
%extend:_(s64) = G_ZEXT %masked
%shiftamt:_(s32) = G_CONSTANT i32 2
%shl:_(s64) = G_SHL %extend, %shiftamt
$vgpr0_vgpr1 = COPY %shl
...
---
name: narrow_shl_s64_by_2_from_sext_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: narrow_shl_s64_by_2_from_sext_s32
; GFX6: liveins: $vgpr0
; GFX6: %narrow:_(s32) = COPY $vgpr0
; GFX6: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX6: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX6: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX6: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX6: $vgpr0_vgpr1 = COPY %shl(s64)
; GFX9-LABEL: name: narrow_shl_s64_by_2_from_sext_s32
; GFX9: liveins: $vgpr0
; GFX9: %narrow:_(s32) = COPY $vgpr0
; GFX9: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX9: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX9: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX9: $vgpr0_vgpr1 = COPY %shl(s64)
%narrow:_(s32) = COPY $vgpr0
%masklow30:_(s32) = G_CONSTANT i32 1073741823
%masked:_(s32) = G_AND %narrow, %masklow30
%extend:_(s64) = G_SEXT %masked
%shiftamt:_(s32) = G_CONSTANT i32 2
%shl:_(s64) = G_SHL %extend, %shiftamt
$vgpr0_vgpr1 = COPY %shl
...
---
name: narrow_shl_s64_by_2_from_zext_s32_lookthrough_amount
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: narrow_shl_s64_by_2_from_zext_s32_lookthrough_amount
; GFX6: liveins: $vgpr0
; GFX6: %narrow:_(s32) = COPY $vgpr0
; GFX6: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX6: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX6: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX6: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX6: $vgpr0_vgpr1 = COPY %shl(s64)
; GFX9-LABEL: name: narrow_shl_s64_by_2_from_zext_s32_lookthrough_amount
; GFX9: liveins: $vgpr0
; GFX9: %narrow:_(s32) = COPY $vgpr0
; GFX9: %masklow30:_(s32) = G_CONSTANT i32 1073741823
; GFX9: %masked:_(s32) = G_AND %narrow, %masklow30
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL %masked, [[C]](s32)
; GFX9: %shl:_(s64) = G_ZEXT [[SHL]](s32)
; GFX9: $vgpr0_vgpr1 = COPY %shl(s64)
%narrow:_(s32) = COPY $vgpr0
%masklow30:_(s32) = G_CONSTANT i32 1073741823
%masked:_(s32) = G_AND %narrow, %masklow30
%extend:_(s64) = G_ZEXT %masked
%shiftamt64:_(s64) = G_CONSTANT i64 2
%shiftamt:_(s32) = G_TRUNC %shiftamt64
%shl:_(s64) = G_SHL %extend, %shiftamt
$vgpr0_vgpr1 = COPY %shl
...
# Can't introduce a 16-bit shift before gfx8
---
name: narrow_shl_s32_by_2_from_zext_s16
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: narrow_shl_s32_by_2_from_zext_s16
; GFX6: liveins: $vgpr0
; GFX6: %argument:_(s32) = COPY $vgpr0
; GFX6: %narrow:_(s16) = G_TRUNC %argument(s32)
; GFX6: %masklow14:_(s16) = G_CONSTANT i16 16383
; GFX6: %masked:_(s16) = G_AND %narrow, %masklow14
; GFX6: %extend:_(s32) = G_ZEXT %masked(s16)
; GFX6: %shiftamt:_(s32) = G_CONSTANT i32 2
; GFX6: %shl:_(s32) = G_SHL %extend, %shiftamt(s32)
; GFX6: $vgpr0 = COPY %shl(s32)
; GFX9-LABEL: name: narrow_shl_s32_by_2_from_zext_s16
; GFX9: liveins: $vgpr0
; GFX9: %argument:_(s32) = COPY $vgpr0
; GFX9: %narrow:_(s16) = G_TRUNC %argument(s32)
; GFX9: %masklow14:_(s16) = G_CONSTANT i16 16383
; GFX9: %masked:_(s16) = G_AND %narrow, %masklow14
; GFX9: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL %masked, [[C]](s16)
; GFX9: %shl:_(s32) = G_ZEXT [[SHL]](s16)
; GFX9: $vgpr0 = COPY %shl(s32)
%argument:_(s32) = COPY $vgpr0
%narrow:_(s16) = G_TRUNC %argument
%masklow14:_(s16) = G_CONSTANT i16 16383
%masked:_(s16) = G_AND %narrow, %masklow14
%extend:_(s32) = G_ZEXT %masked
%shiftamt:_(s32) = G_CONSTANT i32 2
%shl:_(s32) = G_SHL %extend, %shiftamt
$vgpr0 = COPY %shl
...
---
name: narrow_shl_s64_by_2_from_zext_s16
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $vgpr0
; GFX6-LABEL: name: narrow_shl_s64_by_2_from_zext_s16
; GFX6: liveins: $vgpr0
; GFX6: %argument:_(s32) = COPY $vgpr0
; GFX6: %narrow:_(s16) = G_TRUNC %argument(s32)
; GFX6: %masklow14:_(s16) = G_CONSTANT i16 16383
; GFX6: %masked:_(s16) = G_AND %narrow, %masklow14
; GFX6: %extend:_(s64) = G_ZEXT %masked(s16)
; GFX6: %shiftamt:_(s32) = G_CONSTANT i32 2
; GFX6: %shl:_(s64) = G_SHL %extend, %shiftamt(s32)
; GFX6: $vgpr0_vgpr1 = COPY %shl(s64)
; GFX9-LABEL: name: narrow_shl_s64_by_2_from_zext_s16
; GFX9: liveins: $vgpr0
; GFX9: %argument:_(s32) = COPY $vgpr0
; GFX9: %narrow:_(s16) = G_TRUNC %argument(s32)
; GFX9: %masklow14:_(s16) = G_CONSTANT i16 16383
; GFX9: %masked:_(s16) = G_AND %narrow, %masklow14
; GFX9: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL %masked, [[C]](s16)
; GFX9: %shl:_(s64) = G_ZEXT [[SHL]](s16)
; GFX9: $vgpr0_vgpr1 = COPY %shl(s64)
%argument:_(s32) = COPY $vgpr0
%narrow:_(s16) = G_TRUNC %argument
%masklow14:_(s16) = G_CONSTANT i16 16383
%masked:_(s16) = G_AND %narrow, %masklow14
%extend:_(s64) = G_ZEXT %masked
%shiftamt:_(s32) = G_CONSTANT i32 2
%shl:_(s64) = G_SHL %extend, %shiftamt
$vgpr0_vgpr1 = COPY %shl
...
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