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af64ca04f5
Add support for the readonly flat Scratch register initialized by the SPI. Differential Revision: https://reviews.llvm.org/D102432
72 lines
3.1 KiB
LLVM
72 lines
3.1 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,RW-FLAT %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+architected-flat-scratch < %s | FileCheck -check-prefixes=GCN,RO-FLAT %s
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; Make sure flat_scratch_init is set
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; GCN-LABEL: {{^}}stack_object_addrspacecast_in_kernel_no_calls:
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; RW-FLAT: s_add_u32 flat_scratch_lo, s4, s7
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; RW-FLAT: s_addc_u32 flat_scratch_hi, s5, 0
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; RO-FLAT-NOT: flat_scratch
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; GCN: flat_store_dword
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; RO-FLAT-NOT: .amdhsa_user_sgpr_private_segment_buffer
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; RW-FLAT: .amdhsa_user_sgpr_flat_scratch_init 1
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; RO-FLAT-NOT: .amdhsa_user_sgpr_flat_scratch_init
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; RW-FLAT: .amdhsa_system_sgpr_private_segment_wavefront_offset
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; RW-FLAT-NOT: .amdhsa_enable_private_segment
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; RO-FLAT-NOT: .amdhsa_system_sgpr_private_segment_wavefront_offset
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; RO-FLAT: .amdhsa_enable_private_segment 1
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; GCN-NOT: .amdhsa_reserve_flat_scratch
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; GCN: COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
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; RW-FLAT: COMPUTE_PGM_RSRC2:USER_SGPR: 6
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; RO-FLAT: COMPUTE_PGM_RSRC2:USER_SGPR: 0
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define amdgpu_kernel void @stack_object_addrspacecast_in_kernel_no_calls() {
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%alloca = alloca i32, addrspace(5)
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%cast = addrspacecast i32 addrspace(5)* %alloca to i32*
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store volatile i32 0, i32* %cast
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ret void
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}
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; TODO: Could optimize out in this case
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; GCN-LABEL: {{^}}stack_object_in_kernel_no_calls:
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; RW-FLAT: s_add_u32 flat_scratch_lo, s4, s7
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; RW-FLAT: s_addc_u32 flat_scratch_hi, s5, 0
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; RO-FLAT-NOT: flat_scratch
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; RW-FLAT: buffer_store_dword
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; RO-FLAT: scratch_store_dword
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; RW-FLAT: .amdhsa_user_sgpr_private_segment_buffer 1
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; RO-FLAT-NOT: .amdhsa_user_sgpr_private_segment_buffer
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; RW-FLAT: .amdhsa_user_sgpr_flat_scratch_init 1
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; RO-FLAT-NOT: .amdhsa_user_sgpr_flat_scratch_init
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; RW-FLAT: .amdhsa_system_sgpr_private_segment_wavefront_offset 1
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; RW-FLAT-NOT: .amdhsa_enable_private_segment
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; RO-FLAT-NOT: .amdhsa_system_sgpr_private_segment_wavefront_offset
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; RO-FLAT: .amdhsa_enable_private_segment 1
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; GCN-NOT: .amdhsa_reserve_flat_scratch
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; GCN: COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
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; RW-FLAT: COMPUTE_PGM_RSRC2:USER_SGPR: 6
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; RO-FLAT: COMPUTE_PGM_RSRC2:USER_SGPR: 0
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define amdgpu_kernel void @stack_object_in_kernel_no_calls() {
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%alloca = alloca i32, addrspace(5)
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store volatile i32 0, i32 addrspace(5)* %alloca
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ret void
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}
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; GCN-LABEL: {{^}}kernel_no_calls_no_stack:
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; GCN-NOT: flat_scratch
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; RW-FLAT: .amdhsa_user_sgpr_private_segment_buffer 1
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; RO-FLAT-NOT: .amdhsa_user_sgpr_private_segment_buffer
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; RW-FLAT: .amdhsa_user_sgpr_flat_scratch_init 0
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; RO-FLAT-NOT: .amdhsa_user_sgpr_flat_scratch_init
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; RW-FLAT: .amdhsa_system_sgpr_private_segment_wavefront_offset 0
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; RW-FLAT-NOT: .amdhsa_enable_private_segment
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; RO-FLAT-NOT: .amdhsa_system_sgpr_private_segment_wavefront_offset
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; RO-FLAT: .amdhsa_enable_private_segment 0
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; RW-FLAT: .amdhsa_reserve_flat_scratch 0
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; RO-FLAT-NOT: .amdhsa_reserve_flat_scratch 0
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; GCN: COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
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; RW-FLAT: COMPUTE_PGM_RSRC2:USER_SGPR: 4
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; RO-FLAT: COMPUTE_PGM_RSRC2:USER_SGPR: 0
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define amdgpu_kernel void @kernel_no_calls_no_stack() {
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ret void
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}
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