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c1329a6c94
Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This will allow the register coalescer to do a better job eliminating copies to m0. For GlobalISel, as a terrible hack, use SGPR_32 for things that should use SCC until booleans are solved. llvm-svn: 375267
68 lines
2.3 KiB
YAML
68 lines
2.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
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---
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name: cvt_pknorm_i16_vsv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GCN-LABEL: name: cvt_pknorm_i16_vsv
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; GCN: liveins: $sgpr0, $vgpr0
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_CVT_PKNORM_I16_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_I16_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_CVT_PKNORM_I16_F32_e64_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pknorm.i16), %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: cvt_pknorm_i16_vvs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GCN-LABEL: name: cvt_pknorm_i16_vvs
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; GCN: liveins: $sgpr0, $vgpr0
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[V_CVT_PKNORM_I16_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_I16_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_CVT_PKNORM_I16_F32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:sgpr(s32) = COPY $sgpr0
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%2:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pknorm.i16), %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: cvt_pknorm_i16_vvv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GCN-LABEL: name: cvt_pknorm_i16_vvv
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; GCN: liveins: $vgpr0, $vgpr1
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[V_CVT_PKNORM_I16_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_I16_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_CVT_PKNORM_I16_F32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pknorm.i16), %0, %1
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S_ENDPGM 0, implicit %2
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...
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