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ab6ec1f384
Pass no longer handles skips. Pass now removes unnecessary unconditional branches and lowers early termination branches. Hence rename to SILateBranchLowering. Move code to handle returns to epilog from SIPreEmitPeephole into SILateBranchLowering. This means SIPreEmitPeephole only contains optional optimisations, and all required transforms are in SILateBranchLowering. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D98915
33 lines
986 B
YAML
33 lines
986 B
YAML
# RUN: llc -o - %s -march=amdgcn -mcpu=fiji -run-pass=si-late-branch-lowering -verify-machineinstrs | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: readlane_exec0
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# GCN: bb.0
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# GCN: S_CBRANCH_EXECZ %bb.2
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---
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name: readlane_exec0
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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liveins: $vgpr1_vgpr2:0x00000001, $vgpr2_vgpr3:0x00000003
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$vgpr4 = V_AND_B32_e32 1, $vgpr1, implicit $exec
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V_CMP_EQ_U32_e32 1, killed $vgpr4, implicit-def $vcc, implicit $exec
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$sgpr0_sgpr1 = S_AND_SAVEEXEC_B64 killed $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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S_CBRANCH_EXECZ %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$sgpr10 = V_READFIRSTLANE_B32 $vgpr2, implicit $exec
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$sgpr11 = V_READFIRSTLANE_B32 $vgpr3, implicit $exec
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$sgpr10 = S_LOAD_DWORD_IMM killed $sgpr10_sgpr11, 0, 0
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S_WAITCNT 127
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$vgpr0 = V_XOR_B32_e32 killed $sgpr10, killed $vgpr0, implicit $exec
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bb.2:
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$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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...
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