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dd9ab77318
Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
92 lines
3.9 KiB
LLVM
92 lines
3.9 KiB
LLVM
; RUN: llc -march=r600 -mcpu=cayman -stress-sched -verify-misched -verify-machineinstrs < %s
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; REQUIRES: asserts
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define amdgpu_kernel void @main() #0 {
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main_body:
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%tmp = load <4 x float>, <4 x float> addrspace(9)* null
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%tmp5 = extractelement <4 x float> %tmp, i32 3
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%tmp6 = fptosi float %tmp5 to i32
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%tmp7 = bitcast i32 %tmp6 to float
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%tmp8 = bitcast float %tmp7 to i32
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%tmp9 = sdiv i32 %tmp8, 4
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%tmp10 = bitcast i32 %tmp9 to float
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%tmp11 = bitcast float %tmp10 to i32
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%tmp12 = mul i32 %tmp11, 4
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%tmp13 = bitcast i32 %tmp12 to float
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%tmp14 = bitcast float %tmp13 to i32
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%tmp15 = sub i32 0, %tmp14
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%tmp16 = bitcast i32 %tmp15 to float
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%tmp17 = bitcast float %tmp7 to i32
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%tmp18 = bitcast float %tmp16 to i32
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%tmp19 = add i32 %tmp17, %tmp18
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%tmp20 = bitcast i32 %tmp19 to float
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%tmp21 = load <4 x float>, <4 x float> addrspace(9)* null
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%tmp22 = extractelement <4 x float> %tmp21, i32 0
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%tmp23 = load <4 x float>, <4 x float> addrspace(9)* null
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%tmp24 = extractelement <4 x float> %tmp23, i32 1
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%tmp25 = load <4 x float>, <4 x float> addrspace(9)* null
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%tmp26 = extractelement <4 x float> %tmp25, i32 2
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br label %LOOP
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LOOP: ; preds = %IF31, %main_body
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%temp12.0 = phi float [ 0.000000e+00, %main_body ], [ %tmp47, %IF31 ]
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%temp6.0 = phi float [ %tmp26, %main_body ], [ %temp6.1, %IF31 ]
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%temp5.0 = phi float [ %tmp24, %main_body ], [ %temp5.1, %IF31 ]
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%temp4.0 = phi float [ %tmp22, %main_body ], [ %temp4.1, %IF31 ]
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%tmp27 = bitcast float %temp12.0 to i32
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%tmp28 = bitcast float %tmp10 to i32
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%tmp29 = icmp sge i32 %tmp27, %tmp28
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%tmp30 = sext i1 %tmp29 to i32
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%tmp31 = bitcast i32 %tmp30 to float
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%tmp32 = bitcast float %tmp31 to i32
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%tmp33 = icmp ne i32 %tmp32, 0
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br i1 %tmp33, label %IF, label %LOOP29
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IF: ; preds = %LOOP
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%max.0.i = call float @llvm.maxnum.f32(float %temp4.0, float 0.000000e+00)
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%clamp.i = call float @llvm.minnum.f32(float %max.0.i, float 1.000000e+00)
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%max.0.i3 = call float @llvm.maxnum.f32(float %temp5.0, float 0.000000e+00)
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%clamp.i4 = call float @llvm.minnum.f32(float %max.0.i3, float 1.000000e+00)
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%max.0.i1 = call float @llvm.maxnum.f32(float %temp6.0, float 0.000000e+00)
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%clamp.i2 = call float @llvm.minnum.f32(float %max.0.i1, float 1.000000e+00)
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%tmp34 = insertelement <4 x float> undef, float %clamp.i, i32 0
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%tmp35 = insertelement <4 x float> %tmp34, float %clamp.i4, i32 1
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%tmp36 = insertelement <4 x float> %tmp35, float %clamp.i2, i32 2
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%tmp37 = insertelement <4 x float> %tmp36, float 1.000000e+00, i32 3
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call void @llvm.r600.store.swizzle(<4 x float> %tmp37, i32 0, i32 0)
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ret void
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LOOP29: ; preds = %ENDIF30, %LOOP
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%temp6.1 = phi float [ %temp4.1, %ENDIF30 ], [ %temp6.0, %LOOP ]
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%temp5.1 = phi float [ %temp6.1, %ENDIF30 ], [ %temp5.0, %LOOP ]
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%temp4.1 = phi float [ %temp5.1, %ENDIF30 ], [ %temp4.0, %LOOP ]
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%temp20.0 = phi float [ %tmp50, %ENDIF30 ], [ 0.000000e+00, %LOOP ]
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%tmp38 = bitcast float %temp20.0 to i32
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%tmp39 = bitcast float %tmp20 to i32
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%tmp40 = icmp sge i32 %tmp38, %tmp39
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%tmp41 = sext i1 %tmp40 to i32
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%tmp42 = bitcast i32 %tmp41 to float
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%tmp43 = bitcast float %tmp42 to i32
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%tmp44 = icmp ne i32 %tmp43, 0
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br i1 %tmp44, label %IF31, label %ENDIF30
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IF31: ; preds = %LOOP29
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%tmp45 = bitcast float %temp12.0 to i32
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%tmp46 = add i32 %tmp45, 1
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%tmp47 = bitcast i32 %tmp46 to float
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br label %LOOP
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ENDIF30: ; preds = %LOOP29
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%tmp48 = bitcast float %temp20.0 to i32
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%tmp49 = add i32 %tmp48, 1
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%tmp50 = bitcast i32 %tmp49 to float
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br label %LOOP29
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}
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declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) #0
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declare float @llvm.minnum.f32(float, float) #1
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declare float @llvm.maxnum.f32(float, float) #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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