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llvm-mirror/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

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# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass si-insert-waitcnts -o - %s | FileCheck -check-prefix=GFX10 %s
# GFX10-LABEL: waitcnt-vscnt
# GFX10: GLOBAL_ATOMIC_ADD_RTN
# GFX10-NEXT: S_WAITCNT 49279
---
name: waitcnt-vscnt
machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
$sgpr4 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 4, 0 :: (dereferenceable invariant load (s32) from `i32 addrspace(4)* undef`)
S_WAITCNT_VSCNT undef $sgpr_null, 0
$vgpr0 = GLOBAL_ATOMIC_ADD_RTN $vgpr0_vgpr1, $vgpr2, 0, 1, implicit $exec :: (load store syncscope("agent") seq_cst (s32), addrspace 1)
S_CMP_LG_U32 killed $sgpr4, 0, implicit-def $scc
...