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e3b8614158
Before this change, the *InstPrinter.cpp files of each target where some of the slowest objects to compile in all of LLVM. See this snippet produced by ClangBuildAnalyzer: https://reviews.llvm.org/P8171$96 Search for "InstPrinter", and see that it shows up in a few places. Tablegen was emitting a large switch containing a sequence of operand checks, each of which created many conditions and many BBs. Register allocation and jump threading both did not scale well with such a large repetitive sequence of basic blocks. So, this change essentially turns those control flow structures into data. The previous structure looked like: switch (Opc) { case TGT::ADD: // check alias 1 if (MI->getOperandCount() == N && // check num opnds MI->getOperand(0).isReg() && // check opnd 0 ... MI->getOperand(1).isImm() && // check opnd 1 AsmString = "foo"; break; } // check alias 2 if (...) ... return false; The new structure looks like: OpToPatterns: Sorted table of opcodes mapping to pattern indices. \-> Patterns: List of patterns. Previous table points to subrange of patterns to match. \-> Conds: The if conditions above encoded as a kind and 32-bit value. See MCInstPrinter.cpp for the details of how the new data structures are interpreted. Here are some before and after metrics. Time to compile AArch64InstPrinter.cpp: 0m29.062s vs. 0m2.203s size of the obj: 3.9M vs. 676K size of clang.exe: 97M vs. 96M I have not benchmarked disassembly performance, but typically disassemblers are bottlenecked on IO and string processing, not alias matching, so I'm not sure it's interesting enough to be worth doing. Reviewers: RKSimon, andreadb, xbolva00, craig.topper Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D70650 |
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| .. | ||
| GlobalISel | ||
| AsmMatcherEmitter.cpp | ||
| AsmWriterEmitter.cpp | ||
| AsmWriterInst.cpp | ||
| AsmWriterInst.h | ||
| Attributes.cpp | ||
| CallingConvEmitter.cpp | ||
| CMakeLists.txt | ||
| CodeEmitterGen.cpp | ||
| CodeGenDAGPatterns.cpp | ||
| CodeGenDAGPatterns.h | ||
| CodeGenHwModes.cpp | ||
| CodeGenHwModes.h | ||
| CodeGenInstruction.cpp | ||
| CodeGenInstruction.h | ||
| CodeGenIntrinsics.h | ||
| CodeGenMapTable.cpp | ||
| CodeGenRegisters.cpp | ||
| CodeGenRegisters.h | ||
| CodeGenSchedule.cpp | ||
| CodeGenSchedule.h | ||
| CodeGenTarget.cpp | ||
| CodeGenTarget.h | ||
| CTagsEmitter.cpp | ||
| DAGISelEmitter.cpp | ||
| DAGISelMatcher.cpp | ||
| DAGISelMatcher.h | ||
| DAGISelMatcherEmitter.cpp | ||
| DAGISelMatcherGen.cpp | ||
| DAGISelMatcherOpt.cpp | ||
| DFAEmitter.cpp | ||
| DFAEmitter.h | ||
| DFAPacketizerEmitter.cpp | ||
| DisassemblerEmitter.cpp | ||
| ExegesisEmitter.cpp | ||
| FastISelEmitter.cpp | ||
| FixedLenDecoderEmitter.cpp | ||
| GICombinerEmitter.cpp | ||
| GlobalISelEmitter.cpp | ||
| InfoByHwMode.cpp | ||
| InfoByHwMode.h | ||
| InstrDocsEmitter.cpp | ||
| InstrInfoEmitter.cpp | ||
| IntrinsicEmitter.cpp | ||
| LLVMBuild.txt | ||
| OptEmitter.cpp | ||
| OptEmitter.h | ||
| OptParserEmitter.cpp | ||
| OptRSTEmitter.cpp | ||
| PredicateExpander.cpp | ||
| PredicateExpander.h | ||
| PseudoLoweringEmitter.cpp | ||
| RegisterBankEmitter.cpp | ||
| RegisterInfoEmitter.cpp | ||
| RISCVCompressInstEmitter.cpp | ||
| SDNodeProperties.cpp | ||
| SDNodeProperties.h | ||
| SearchableTableEmitter.cpp | ||
| SequenceToOffsetTable.h | ||
| SubtargetEmitter.cpp | ||
| SubtargetFeatureInfo.cpp | ||
| SubtargetFeatureInfo.h | ||
| TableGen.cpp | ||
| TableGenBackends.h | ||
| tdtags | ||
| Types.cpp | ||
| Types.h | ||
| WebAssemblyDisassemblerEmitter.cpp | ||
| WebAssemblyDisassemblerEmitter.h | ||
| X86DisassemblerShared.h | ||
| X86DisassemblerTables.cpp | ||
| X86DisassemblerTables.h | ||
| X86EVEX2VEXTablesEmitter.cpp | ||
| X86FoldTablesEmitter.cpp | ||
| X86ModRMFilters.cpp | ||
| X86ModRMFilters.h | ||
| X86RecognizableInstr.cpp | ||
| X86RecognizableInstr.h | ||