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6f3828aa04
Add generic instructions for load complement, load negative and load positive for fp32 and fp64, and let isel prefer them. They do not clobber CC, and so give scheduler more freedom. SystemZElimCompare pass will convert them when it can to the CC-setting variants. Regression tests updated to expect the new opcodes in places where the old ones where used. New test case SystemZ/fp-cmp-05.ll checks that SystemZCompareElim.cpp can handle the new opcodes. README.txt updated (bullet removed). Note that fp128 is not yet handled, because it is relatively rare, and is a bit trickier, because of the fact that l.dfr would operate on the sign bit of one of the subregisters of a fp128, but we would not want to copy the other sub-reg in case src and dst regs are not the same. Reviewed by Ulrich Weigand. llvm-svn: 249046
76 lines
2.8 KiB
LLVM
76 lines
2.8 KiB
LLVM
; Test the handling of GPR, FPR and stack arguments when integers are
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; sign-extended.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-INT
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FLOAT
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-DOUBLE
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-1
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-2
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-STACK
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declare void @bar(i8 signext, i16 signext, i32 signext, i64, float, double,
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fp128, i64, float, double, i8 signext, i16 signext,
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i32 signext, i64, float, double, fp128)
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; There are two indirect fp128 slots, one at offset 224 (the first available
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; byte after the outgoing arguments) and one immediately after it at 240.
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; These slots should be set up outside the glued call sequence, so would
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; normally use %f0/%f2 as the first available 128-bit pair. This choice
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; is hard-coded in the FP128 tests.
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;
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; The order of the CHECK-STACK stores doesn't matter. It would be OK to reorder
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; them in response to future code changes.
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define void @foo() {
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; CHECK-INT-LABEL: foo:
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; CHECK-INT-DAG: lghi %r2, -1
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; CHECK-INT-DAG: lghi %r3, -2
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; CHECK-INT-DAG: lghi %r4, -3
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; CHECK-INT-DAG: lghi %r5, -4
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; CHECK-INT-DAG: la %r6, {{224|240}}(%r15)
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; CHECK-INT: brasl %r14, bar@PLT
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;
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; CHECK-FLOAT-LABEL: foo:
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; CHECK-FLOAT: lzer %f0
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; CHECK-FLOAT: lcdfr %f4, %f0
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; CHECK-FLOAT: brasl %r14, bar@PLT
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;
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; CHECK-DOUBLE-LABEL: foo:
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; CHECK-DOUBLE: lzdr %f2
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; CHECK-DOUBLE: lcdfr %f6, %f2
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; CHECK-DOUBLE: brasl %r14, bar@PLT
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;
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; CHECK-FP128-1-LABEL: foo:
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; CHECK-FP128-1: aghi %r15, -256
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; CHECK-FP128-1: lzxr %f0
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; CHECK-FP128-1-DAG: std %f0, 224(%r15)
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; CHECK-FP128-1-DAG: std %f2, 232(%r15)
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; CHECK-FP128-1: brasl %r14, bar@PLT
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;
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; CHECK-FP128-2-LABEL: foo:
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; CHECK-FP128-2: aghi %r15, -256
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; CHECK-FP128-2: lzxr %f0
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; CHECK-FP128-2-DAG: std %f0, 240(%r15)
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; CHECK-FP128-2-DAG: std %f2, 248(%r15)
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; CHECK-FP128-2: brasl %r14, bar@PLT
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;
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; CHECK-STACK-LABEL: foo:
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; CHECK-STACK: aghi %r15, -256
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; CHECK-STACK: la [[REGISTER:%r[0-5]+]], {{224|240}}(%r15)
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; CHECK-STACK: stg [[REGISTER]], 216(%r15)
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; CHECK-STACK: mvghi 208(%r15), 0
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; CHECK-STACK: mvhi 204(%r15), 0
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; CHECK-STACK: mvghi 192(%r15), -9
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; CHECK-STACK: mvghi 184(%r15), -8
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; CHECK-STACK: mvghi 176(%r15), -7
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; CHECK-STACK: mvghi 168(%r15), -6
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; CHECK-STACK: mvghi 160(%r15), -5
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; CHECK-STACK: brasl %r14, bar@PLT
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call void @bar (i8 -1, i16 -2, i32 -3, i64 -4, float 0.0, double 0.0,
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fp128 0xL00000000000000000000000000000000, i64 -5,
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float -0.0, double -0.0, i8 -6, i16 -7, i32 -8, i64 -9,
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float 0.0, double 0.0,
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fp128 0xL00000000000000000000000000000000)
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ret void
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}
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