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5f15092063
This patch series adds support for the IBM z14 processor. This part includes: - Basic support for the new processor and its features. - Support for new instructions (except vector 32-bit float and 128-bit float). - CodeGen for new instructions, including new LLVM intrinsics. - Scheduler description for the new processor. - Detection of z14 as host processor. Support for the new 32-bit vector float and 128-bit vector float instructions is provided by separate patches. llvm-svn: 308194
166 lines
4.4 KiB
LLVM
166 lines
4.4 KiB
LLVM
; Test signed high-part i64->i128 multiplications on z14.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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declare i64 @foo()
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; Check sign-extended multiplication in which only the high part is used.
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define i64 @f1(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f1:
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; CHECK-NOT: {{%r[234]}}
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; CHECK: mgrk %r2, %r3, %r4
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; CHECK: br %r14
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check sign-extended multiplication in which only part of the high half
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; is used.
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define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f2:
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; CHECK-NOT: {{%r[234]}}
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; CHECK: mgrk [[REG:%r[0-9]+]], %r3, %r4
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; CHECK: srlg %r2, [[REG]], 3
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; CHECK: br %r14
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 67
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check sign-extended multiplication in which the result is split into
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; high and low halves.
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define i64 @f3(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f3:
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; CHECK-NOT: {{%r[234]}}
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; CHECK: mgrk %r2, %r3, %r4
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; CHECK: ogr %r2, %r3
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; CHECK: br %r14
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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%low = trunc i128 %mulx to i64
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%or = or i64 %high, %low
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ret i64 %or
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}
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; Check MG with no displacement.
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define i64 @f4(i64 %dummy, i64 %a, i64 *%src) {
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; CHECK-LABEL: f4:
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; CHECK-NOT: {{%r[234]}}
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; CHECK: mg %r2, 0(%r4)
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; CHECK: br %r14
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%b = load i64 , i64 *%src
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the high end of the aligned MG range.
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define i64 @f5(i64 %dummy, i64 %a, i64 *%src) {
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; CHECK-LABEL: f5:
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; CHECK: mg %r2, 524280(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 65535
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%b = load i64 , i64 *%ptr
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the next doubleword up, which requires separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f6(i64 %dummy, i64 %a, i64 *%src) {
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; CHECK-LABEL: f6:
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; CHECK: agfi %r4, 524288
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; CHECK: mg %r2, 0(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 65536
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%b = load i64 , i64 *%ptr
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the high end of the negative aligned MG range.
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define i64 @f7(i64 %dummy, i64 %a, i64 *%src) {
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; CHECK-LABEL: f7:
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; CHECK: mg %r2, -8(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 -1
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%b = load i64 , i64 *%ptr
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the low end of the MG range.
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define i64 @f8(i64 %dummy, i64 %a, i64 *%src) {
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; CHECK-LABEL: f8:
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; CHECK: mg %r2, -524288(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 -65536
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%b = load i64 , i64 *%ptr
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f9(i64 *%dest, i64 %a, i64 *%src) {
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; CHECK-LABEL: f9:
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; CHECK: agfi %r4, -524296
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; CHECK: mg %r2, 0(%r4)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 -65537
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%b = load i64 , i64 *%ptr
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check that MG allows an index.
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define i64 @f10(i64 *%dest, i64 %a, i64 %src, i64 %index) {
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; CHECK-LABEL: f10:
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; CHECK: mg %r2, 524287(%r5,%r4)
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to i64 *
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%b = load i64 , i64 *%ptr
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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