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f7ea499702
Part of the effort to refactoring frame pointer code generation. We used to use two function attributes "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" to represent three kinds of frame pointer usage: (all) frames use frame pointer, (non-leaf) frames use frame pointer, (none) frame use frame pointer. This CL makes the idea explicit by using only one enum function attribute "frame-pointer" Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as llc. "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still supported for easy migration to "frame-pointer". tests are mostly updated with // replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’ grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g" // replace command line args ‘-disable-fp-elim’ with ‘-frame-pointer=all’ grep -iIrnl '\-disable-fp-elim' * | xargs sed -i '' -e "s/-disable-fp-elim/-frame-pointer=all/g" Patch by Yuanfang Chen (tabloid.adroit)! Differential Revision: https://reviews.llvm.org/D56351 llvm-svn: 351049
38 lines
1.1 KiB
LLVM
38 lines
1.1 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=arm64-apple-ios7.0 -frame-pointer=all -o - %s | FileCheck %s
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; When generating DAG selection tables, TableGen used to only flag an
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; instruction as needing a chain on its own account if it had a built-in pattern
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; which used the chain. This meant that the AArch64 load/stores weren't
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; recognised and so both loads from %locvar below were coalesced into a single
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; LS8_LDR instruction (same operands other than the non-existent chain) and the
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; increment was lost at return.
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; This was obviously a Bad Thing.
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declare void @bar(i8*)
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define i64 @test_chains() {
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; CHECK-LABEL: test_chains:
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%locvar = alloca i8
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call void @bar(i8* %locvar)
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; CHECK: bl {{_?bar}}
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%inc.1 = load i8, i8* %locvar
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%inc.2 = zext i8 %inc.1 to i64
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%inc.3 = add i64 %inc.2, 1
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%inc.4 = trunc i64 %inc.3 to i8
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store i8 %inc.4, i8* %locvar
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; CHECK: ldurb {{w[0-9]+}}, [x29, [[LOCADDR:#-?[0-9]+]]]
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, #1
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; CHECK: sturb w[[STRVAL:[0-9]+]], [x29, [[LOCADDR]]]
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; CHECK: and x0, x[[STRVAL]], #0xff
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%ret.1 = load i8, i8* %locvar
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%ret.2 = zext i8 %ret.1 to i64
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ret i64 %ret.2
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; CHECK: ret
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}
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