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7dcf1654f8
Based ontop of D104598, which is a NFCI-ish refactoring. Here, a restriction, that only empty blocks can be merged, is lifted. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D104597
60 lines
1.4 KiB
LLVM
60 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
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target triple = "thumbv7-apple-ios8.0.0"
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declare void @g(i32)
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define void @f(i32 %val) optsize minsize {
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; CHECK-LABEL: f:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov r1, r0
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: cbz r1, LBB0_6
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; CHECK-NEXT: @ %bb.1:
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; CHECK-NEXT: movw r2, #1154
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; CHECK-NEXT: cmp r1, r2
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; CHECK-NEXT: beq LBB0_4
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; CHECK-NEXT: @ %bb.2:
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; CHECK-NEXT: movw r2, #994
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; CHECK-NEXT: cmp r1, r2
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; CHECK-NEXT: beq LBB0_5
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; CHECK-NEXT: @ %bb.3:
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; CHECK-NEXT: cmp r1, #9
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; CHECK-NEXT: it ne
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; CHECK-NEXT: movne r0, #11
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; CHECK-NEXT: b LBB0_6
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; CHECK-NEXT: LBB0_4: @ %four
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; CHECK-NEXT: movs r0, #87
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; CHECK-NEXT: b LBB0_6
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; CHECK-NEXT: LBB0_5: @ %three
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; CHECK-NEXT: movs r0, #78
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; CHECK-NEXT: LBB0_6: @ %common.ret
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; CHECK-NEXT: str lr, [sp, #-4]!
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; CHECK-NEXT: bl _g
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; CHECK-NEXT: ldr lr, [sp], #4
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; CHECK-NEXT: bx lr
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switch i32 %val, label %def [
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i32 0, label %one
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i32 9, label %two
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i32 994, label %three
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i32 1154, label %four
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]
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one:
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call void @g(i32 1)
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ret void
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two:
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call void @g(i32 001)
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ret void
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three:
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call void @g(i32 78)
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ret void
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four:
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call void @g(i32 87)
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ret void
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def:
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call void @g(i32 11)
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ret void
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}
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