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73 lines
2.6 KiB
LLVM
73 lines
2.6 KiB
LLVM
; RUN: llc -fp-contract=fast -O3 -march=hexagon < %s
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; REQUIRES: asserts
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; Test that the pipeliner doesn't ICE due because the PHI generation
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; code in the epilog does not attempt to reuse an existing PHI.
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; Similar test case as swp-epilog-reuse.ll but with a couple of
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; differences.
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; Function Attrs: nounwind
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define void @f0(float* noalias %a0, float* noalias %a1) #0 {
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b0:
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%v0 = getelementptr inbounds float, float* %a1, i32 2
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br i1 undef, label %b1, label %b6
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b1: ; preds = %b5, %b0
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%v1 = phi float* [ undef, %b5 ], [ %v0, %b0 ]
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%v2 = phi float* [ %v32, %b5 ], [ undef, %b0 ]
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%v3 = getelementptr inbounds float, float* %a0, i32 undef
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%v4 = getelementptr inbounds float, float* %v1, i32 1
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br i1 undef, label %b2, label %b5
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b2: ; preds = %b1
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%v5 = getelementptr float, float* %v3, i32 1
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br label %b3
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b3: ; preds = %b3, %b2
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%v6 = phi float* [ %v5, %b2 ], [ %v20, %b3 ]
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%v7 = phi float [ %v19, %b3 ], [ undef, %b2 ]
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%v8 = phi float [ %v7, %b3 ], [ undef, %b2 ]
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%v9 = phi float* [ %v15, %b3 ], [ %v4, %b2 ]
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%v10 = bitcast float* %v6 to i8*
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%v11 = fadd float undef, 0.000000e+00
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%v12 = fadd float undef, %v11
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%v13 = fadd float %v7, %v12
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%v14 = fmul float %v13, 3.906250e-03
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%v15 = getelementptr inbounds float, float* %v9, i32 1
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store float %v14, float* %v9, align 4, !tbaa !0
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%v16 = getelementptr i8, i8* %v10, i32 undef
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%v17 = bitcast i8* %v16 to float*
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%v18 = load float, float* %v17, align 4, !tbaa !0
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%v19 = fadd float %v18, undef
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%v20 = getelementptr float, float* %v6, i32 2
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%v21 = icmp ult float* %v15, %v2
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br i1 %v21, label %b3, label %b4
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b4: ; preds = %b3
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%v22 = getelementptr float, float* %v4, i32 undef
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br label %b5
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b5: ; preds = %b4, %b1
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%v23 = phi float* [ %v4, %b1 ], [ %v22, %b4 ]
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%v24 = phi float [ undef, %b1 ], [ %v8, %b4 ]
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%v25 = fadd float %v24, undef
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%v26 = fadd float %v25, undef
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%v27 = fadd float undef, %v26
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%v28 = fadd float undef, %v27
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%v29 = fpext float %v28 to double
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%v30 = fmul double %v29, 0x3F7111112119E8FB
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%v31 = fptrunc double %v30 to float
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store float %v31, float* %v23, align 4, !tbaa !0
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%v32 = getelementptr inbounds float, float* %v2, i32 undef
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br i1 undef, label %b1, label %b6
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b6: ; preds = %b5, %b0
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"omnipotent char", !2, i64 0}
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!2 = !{!"Simple C/C++ TBAA"}
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